DE2039499

1332254 Semi-conductor devices INTERNATIONAL BUSINESS MACHINES CORP 9 Aug 1971 [8 Aug 1970] 37263/71 Addition to 1317493 Heading H1K In a FET of the kind described in Specification 1,317,493 wherein a p-doped substrate has diffused or implanted therein spaced N + doped source and drain regions 2, 3 covered by a thin oxide layer 4 metallized at 5 as channel gate, a third strip shaped highly doped diffused or implanted region 6 of e.g. N+conductivity extends laterally into the channel from which a potential is tapped off and connected through the oxide layer to the gate at contact 7 outside the channel. In bi-stable operations momentary application of postitive gate voltage maintains and does not discharge the channel while a gate voltage lower than the FET threshold discharges the channel and holds the gate at low potential. The region 6 may be of opposite conductivity to the drain and source regions to insert a diode path in the gate channel connection. The width of the lateral region may be narrow compared with the length of the channel and part of its area of the region may be thickly and part thinly covered with insulant oxide to obtain further narrowing of the intersection with the channel.