Schaltungsanordnung fuer Teilnehmerstellen an einer ringfoermigen PCM-Vermittlungsleitung

1,187,490. Sub-station circuits. STANDARD TELEPHONES & CABLES Ltd. 21 June, 1968, No. 29773/68. Heading H4K. In a PCM telephone system in which subscribers' subsets are connected in a unidirectional transmission loop LL, transmission from one subset to another being round one part of the lo...

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description 1,187,490. Sub-station circuits. STANDARD TELEPHONES & CABLES Ltd. 21 June, 1968, No. 29773/68. Heading H4K. In a PCM telephone system in which subscribers' subsets are connected in a unidirectional transmission loop LL, transmission from one subset to another being round one part of the loop and transmission in the opposite direction being round the remaining part of the loop, each subset has a shift register SR recording all incoming PCM codes and for recording PCM codes for transmission from the subset in a channel seized on the loop during which channel time a switch A is operated to break the loop to terminate an incoming PCM code and to send a PCM code set up on SR. The subset microphone has an associated coder PCMC and store CS from which a PCM code is passed in parallel to register SR to be read out serially on to the loop by clock pulses during the seized channel. The code read out of SR is replaced by an incoming code in the same channel the received code being read out in parallel to store DS and decoder DS driving the subset earpiece. As shown in Fig. 3 the switch A comprises the AND gates SRO, LLI, and the NAND gate LLO, gate SRO being primed by channel pulses to gate the output of register SR into the loop LL which due to inverter INV is broken by gate LLI. A clock-driven bi-stable FF effects retiming and regeneration of all bits on the loop, gates LL1 and LL2 producing a balanced output.
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STANDARD TELEPHONES &amp; CABLES Ltd. 21 June, 1968, No. 29773/68. Heading H4K. In a PCM telephone system in which subscribers' subsets are connected in a unidirectional transmission loop LL, transmission from one subset to another being round one part of the loop and transmission in the opposite direction being round the remaining part of the loop, each subset has a shift register SR recording all incoming PCM codes and for recording PCM codes for transmission from the subset in a channel seized on the loop during which channel time a switch A is operated to break the loop to terminate an incoming PCM code and to send a PCM code set up on SR. The subset microphone has an associated coder PCMC and store CS from which a PCM code is passed in parallel to register SR to be read out serially on to the loop by clock pulses during the seized channel. The code read out of SR is replaced by an incoming code in the same channel the received code being read out in parallel to store DS and decoder DS driving the subset earpiece. As shown in Fig. 3 the switch A comprises the AND gates SRO, LLI, and the NAND gate LLO, gate SRO being primed by channel pulses to gate the output of register SR into the loop LL which due to inverter INV is broken by gate LLI. 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Sub-station circuits. STANDARD TELEPHONES &amp; CABLES Ltd. 21 June, 1968, No. 29773/68. Heading H4K. In a PCM telephone system in which subscribers' subsets are connected in a unidirectional transmission loop LL, transmission from one subset to another being round one part of the loop and transmission in the opposite direction being round the remaining part of the loop, each subset has a shift register SR recording all incoming PCM codes and for recording PCM codes for transmission from the subset in a channel seized on the loop during which channel time a switch A is operated to break the loop to terminate an incoming PCM code and to send a PCM code set up on SR. The subset microphone has an associated coder PCMC and store CS from which a PCM code is passed in parallel to register SR to be read out serially on to the loop by clock pulses during the seized channel. The code read out of SR is replaced by an incoming code in the same channel the received code being read out in parallel to store DS and decoder DS driving the subset earpiece. As shown in Fig. 3 the switch A comprises the AND gates SRO, LLI, and the NAND gate LLO, gate SRO being primed by channel pulses to gate the output of register SR into the loop LL which due to inverter INV is broken by gate LLI. A clock-driven bi-stable FF effects retiming and regeneration of all bits on the loop, gates LL1 and LL2 producing a balanced output.</abstract><oa>free_for_read</oa></addata></record>
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TELEPHONIC COMMUNICATION
title Schaltungsanordnung fuer Teilnehmerstellen an einer ringfoermigen PCM-Vermittlungsleitung
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