Binaeres Verknuepfungsglieder-Schaltnetz und Verfahren zu dessen Herstellung

975,657. Transistor logic circuits. INTERNATIONAL BUSINESS MACHINES CORPORATION. March 27, 1962 [April 21, 1961], No. 11614/62. Heading H3T. [Also in Division H1] A logical circuit comprises a number of inlet terminals each connected to an inlet of at least one of a number of sum-to-one circuits such that each sum-to-one circuit has at least two inlets connected to the inlet terminals, and an OR circuit connected to the outlets of the logical circuits. As described, a logic circuit comprises a pair of double-emitter transistors 60, 70. Inputs x, y are fed to the base of transistor 60, and input z to one of its emitters, the arrangement being such that a negative potential representing a logical 1 applied to z will switch the transistor off, giving a logical 1 output on line D, only if inputs x, y are both logical 0's. All other combinations of input leave transistor 60 conducting. Input x is also fed to one of the emitters of transistor 70 and input z to its base, so that a logical 1 output on line EG is produced whenever x is present without z. The two outputs D, EG are fed to an OR circuit comprising double diode 75 to produce an output at terminal 90 whenever z is 1 and x and y 0, or when x is 1 and z is 0 (i.e. the output at terminal 90 is z.#x.#y+x.#z). The two transistors and the double diode may be combined into a single semi-conductor solid circuit (see Division H1).