PLL-Filter mit einem kapazitivem Spannungsteiler

PLL-Filter mit einem kapazitivem Spannungsteiler

A phase-locked loop (PLL) includes a detector configured to generate an error signal based on a difference between a reference signal and an output signal, a charge pump configured to generate current pulses based on the error signal, a loop filter configured to generate a control voltage based on t...

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Hauptverfasser: Efthivoulidis, George, Thurner, Peter
Format: Patent
Sprache:ger
Schlagworte:
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
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creator Efthivoulidis, George
Thurner, Peter
description A phase-locked loop (PLL) includes a detector configured to generate an error signal based on a difference between a reference signal and an output signal, a charge pump configured to generate current pulses based on the error signal, a loop filter configured to generate a control voltage based on the current pulses, and a voltage-controlled oscillator (VCO) configured to generate the output signal at a frequency which is a function of the control voltage. The loop filter includes a capacitive voltage divider configured to reduce the control voltage from a range that falls within a voltage domain of the charge pump to a range that falls within a voltage domain of the VCO, the voltage domain of the charge pump being greater than the voltage domain of the VCO.
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subjects AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
title PLL-Filter mit einem kapazitivem Spannungsteiler
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