DATENSPEICHERZELLE
A memory is produced which has a series circuit including charge storage means, an impedance and switching means and an amplifier having an input connected to the series circuit at a point between the charge storage means and the impedance and an output coupled to a bit/sense line. The switching mea...
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| creator | PRICER,WILBUR D.,US JOSHI,MADHUKAR L.,IN |
| description | A memory is produced which has a series circuit including charge storage means, an impedance and switching means and an amplifier having an input connected to the series circuit at a point between the charge storage means and the impedance and an output coupled to a bit/sense line. The switching means is controlled by a pulse from a word line. The series circuit interconnects the bit/sense line and a point of reference potential. In a preferred embodiment, the switching means is a first field effect transistor having its gate electrode connected to the word line and the amplifier is a second field effect transistor having its gate electrode connected to the series circuit at a point between the charge storage means and the impedance and having one of its current carrying electrodes coupled to the bit/sense line and its other current carrying electrode coupled to a point of reference potential. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_DD141082A5</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>DD141082A5</sourcerecordid><originalsourceid>FETCH-epo_espacenet_DD141082A53</originalsourceid><addsrcrecordid>eNrjZBBycQxx9QsOcPV09nANinL18XHlYWBNS8wpTuWF0twM8m6uIc4euqkF-fGpxQWJyal5qSXxLi6GJoYGFkaOpsaEVQAA2B4dSA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>DATENSPEICHERZELLE</title><source>esp@cenet</source><creator>PRICER,WILBUR D.,US ; JOSHI,MADHUKAR L.,IN</creator><creatorcontrib>PRICER,WILBUR D.,US ; JOSHI,MADHUKAR L.,IN</creatorcontrib><description>A memory is produced which has a series circuit including charge storage means, an impedance and switching means and an amplifier having an input connected to the series circuit at a point between the charge storage means and the impedance and an output coupled to a bit/sense line. The switching means is controlled by a pulse from a word line. The series circuit interconnects the bit/sense line and a point of reference potential. In a preferred embodiment, the switching means is a first field effect transistor having its gate electrode connected to the word line and the amplifier is a second field effect transistor having its gate electrode connected to the series circuit at a point between the charge storage means and the impedance and having one of its current carrying electrodes coupled to the bit/sense line and its other current carrying electrode coupled to a point of reference potential.</description><edition>3</edition><language>ger</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>1980</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19800409&DB=EPODOC&CC=DD&NR=141082A5$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19800409&DB=EPODOC&CC=DD&NR=141082A5$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PRICER,WILBUR D.,US</creatorcontrib><creatorcontrib>JOSHI,MADHUKAR L.,IN</creatorcontrib><title>DATENSPEICHERZELLE</title><description>A memory is produced which has a series circuit including charge storage means, an impedance and switching means and an amplifier having an input connected to the series circuit at a point between the charge storage means and the impedance and an output coupled to a bit/sense line. The switching means is controlled by a pulse from a word line. The series circuit interconnects the bit/sense line and a point of reference potential. In a preferred embodiment, the switching means is a first field effect transistor having its gate electrode connected to the word line and the amplifier is a second field effect transistor having its gate electrode connected to the series circuit at a point between the charge storage means and the impedance and having one of its current carrying electrodes coupled to the bit/sense line and its other current carrying electrode coupled to a point of reference potential.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1980</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBBycQxx9QsOcPV09nANinL18XHlYWBNS8wpTuWF0twM8m6uIc4euqkF-fGpxQWJyal5qSXxLi6GJoYGFkaOpsaEVQAA2B4dSA</recordid><startdate>19800409</startdate><enddate>19800409</enddate><creator>PRICER,WILBUR D.,US</creator><creator>JOSHI,MADHUKAR L.,IN</creator><scope>EVB</scope></search><sort><creationdate>19800409</creationdate><title>DATENSPEICHERZELLE</title><author>PRICER,WILBUR D.,US ; JOSHI,MADHUKAR L.,IN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_DD141082A53</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>ger</language><creationdate>1980</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>PRICER,WILBUR D.,US</creatorcontrib><creatorcontrib>JOSHI,MADHUKAR L.,IN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PRICER,WILBUR D.,US</au><au>JOSHI,MADHUKAR L.,IN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DATENSPEICHERZELLE</title><date>1980-04-09</date><risdate>1980</risdate><abstract>A memory is produced which has a series circuit including charge storage means, an impedance and switching means and an amplifier having an input connected to the series circuit at a point between the charge storage means and the impedance and an output coupled to a bit/sense line. The switching means is controlled by a pulse from a word line. The series circuit interconnects the bit/sense line and a point of reference potential. In a preferred embodiment, the switching means is a first field effect transistor having its gate electrode connected to the word line and the amplifier is a second field effect transistor having its gate electrode connected to the series circuit at a point between the charge storage means and the impedance and having one of its current carrying electrodes coupled to the bit/sense line and its other current carrying electrode coupled to a point of reference potential.</abstract><edition>3</edition><oa>free_for_read</oa></addata></record> |
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| subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
| title | DATENSPEICHERZELLE |
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