Semiconductor testing device

Semiconductor testing device

The utility model provides a semiconductor testing device, which relates to the technical field of semiconductor testing and comprises a testing table, an outer frame is arranged in the middle of the upper end of the testing table, side push plates are arranged on four side surfaces in the outer fra...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: GAO JUN, LIU HUI, YANG WENBIN, ZOU ZHENYANG
Format: Patent
Sprache:chi ; eng
Schlagworte:
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator GAO JUN
LIU HUI
YANG WENBIN
ZOU ZHENYANG
description The utility model provides a semiconductor testing device, which relates to the technical field of semiconductor testing and comprises a testing table, an outer frame is arranged in the middle of the upper end of the testing table, side push plates are arranged on four side surfaces in the outer frame, threaded holes are formed above the middle parts of the four side surfaces of the outer frame, and the threaded holes are connected with the side push plates. And adjusting bolts are in threaded connection with the interiors of the threaded holes, one ends of the adjusting bolts are rotationally connected with the side pushing plates, limiting sliding rods are fixedly connected to the two sides of the middle of one side of each side pushing plate, and side sliding holes are formed in the two sides of the middle of the four side faces of the outer frame in a penetrating mode. According to the utility model, through the arrangement of the side push plates and the adjusting bolts, when semiconductors with differen
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN221446231UU</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN221446231UU</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN221446231UU3</originalsourceid><addsrcrecordid>eNrjZJAJTs3NTM7PSylNLskvUihJLS7JzEtXSEkty0xO5WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8c5-RkaGJiZmRsaGoaHGRCkCABAtJNY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor testing device</title><source>esp@cenet</source><creator>GAO JUN ; LIU HUI ; YANG WENBIN ; ZOU ZHENYANG</creator><creatorcontrib>GAO JUN ; LIU HUI ; YANG WENBIN ; ZOU ZHENYANG</creatorcontrib><description>The utility model provides a semiconductor testing device, which relates to the technical field of semiconductor testing and comprises a testing table, an outer frame is arranged in the middle of the upper end of the testing table, side push plates are arranged on four side surfaces in the outer frame, threaded holes are formed above the middle parts of the four side surfaces of the outer frame, and the threaded holes are connected with the side push plates. And adjusting bolts are in threaded connection with the interiors of the threaded holes, one ends of the adjusting bolts are rotationally connected with the side pushing plates, limiting sliding rods are fixedly connected to the two sides of the middle of one side of each side pushing plate, and side sliding holes are formed in the two sides of the middle of the four side faces of the outer frame in a penetrating mode. According to the utility model, through the arrangement of the side push plates and the adjusting bolts, when semiconductors with differen</description><language>chi ; eng</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240730&amp;DB=EPODOC&amp;CC=CN&amp;NR=221446231U$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240730&amp;DB=EPODOC&amp;CC=CN&amp;NR=221446231U$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GAO JUN</creatorcontrib><creatorcontrib>LIU HUI</creatorcontrib><creatorcontrib>YANG WENBIN</creatorcontrib><creatorcontrib>ZOU ZHENYANG</creatorcontrib><title>Semiconductor testing device</title><description>The utility model provides a semiconductor testing device, which relates to the technical field of semiconductor testing and comprises a testing table, an outer frame is arranged in the middle of the upper end of the testing table, side push plates are arranged on four side surfaces in the outer frame, threaded holes are formed above the middle parts of the four side surfaces of the outer frame, and the threaded holes are connected with the side push plates. And adjusting bolts are in threaded connection with the interiors of the threaded holes, one ends of the adjusting bolts are rotationally connected with the side pushing plates, limiting sliding rods are fixedly connected to the two sides of the middle of one side of each side pushing plate, and side sliding holes are formed in the two sides of the middle of the four side faces of the outer frame in a penetrating mode. According to the utility model, through the arrangement of the side push plates and the adjusting bolts, when semiconductors with differen</description><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAJTs3NTM7PSylNLskvUihJLS7JzEtXSEkty0xO5WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8c5-RkaGJiZmRsaGoaHGRCkCABAtJNY</recordid><startdate>20240730</startdate><enddate>20240730</enddate><creator>GAO JUN</creator><creator>LIU HUI</creator><creator>YANG WENBIN</creator><creator>ZOU ZHENYANG</creator><scope>EVB</scope></search><sort><creationdate>20240730</creationdate><title>Semiconductor testing device</title><author>GAO JUN ; LIU HUI ; YANG WENBIN ; ZOU ZHENYANG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN221446231UU3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>GAO JUN</creatorcontrib><creatorcontrib>LIU HUI</creatorcontrib><creatorcontrib>YANG WENBIN</creatorcontrib><creatorcontrib>ZOU ZHENYANG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GAO JUN</au><au>LIU HUI</au><au>YANG WENBIN</au><au>ZOU ZHENYANG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor testing device</title><date>2024-07-30</date><risdate>2024</risdate><abstract>The utility model provides a semiconductor testing device, which relates to the technical field of semiconductor testing and comprises a testing table, an outer frame is arranged in the middle of the upper end of the testing table, side push plates are arranged on four side surfaces in the outer frame, threaded holes are formed above the middle parts of the four side surfaces of the outer frame, and the threaded holes are connected with the side push plates. And adjusting bolts are in threaded connection with the interiors of the threaded holes, one ends of the adjusting bolts are rotationally connected with the side pushing plates, limiting sliding rods are fixedly connected to the two sides of the middle of one side of each side pushing plate, and side sliding holes are formed in the two sides of the middle of the four side faces of the outer frame in a penetrating mode. According to the utility model, through the arrangement of the side push plates and the adjusting bolts, when semiconductors with differen</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN221446231UU
source esp@cenet
subjects MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
title Semiconductor testing device
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T12%3A18%3A38IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GAO%20JUN&rft.date=2024-07-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN221446231UU%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true