Vertical HEMT (High Electron Mobility Transistor) device with high voltage resistance and enhanced MIS (Metal-Insulator-Semiconductor) structure
The utility model discloses a vertical HEMT (High Electron Mobility Transistor) device of a P-GaN gate with a high voltage withstanding and enhanced MIS (Metal-Insulator-Semiconductor) structure, which belongs to the technical field of semiconductor devices and comprises a drain electrode, source el...
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creator | YIN YIAN WANG JINYI ZOU BINGZHI |
description | The utility model discloses a vertical HEMT (High Electron Mobility Transistor) device of a P-GaN gate with a high voltage withstanding and enhanced MIS (Metal-Insulator-Semiconductor) structure, which belongs to the technical field of semiconductor devices and comprises a drain electrode, source electrodes, the P-GaN gate, an AlGaN barrier layer and a substrate, the source electrodes are arranged at two sides of the P-GaN gate, the substrate is arranged below the AlGaN barrier layer, the drain electrode is arranged at the bottom of the substrate, and the P-GaN gate is arranged at the bottom of the substrate. A passivation layer is also arranged between the P-GaN gate and the source electrode; and the P-GaN gate comprises a gate electrode, a gate dielectric layer and a P-GaN layer which are sequentially arranged from top to bottom. According to the utility model, the defects in the prior art can be overcome, the introduction of the passivation layer can improve energy band distribution and realize large thres |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN220984533UU</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN220984533UU</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN220984533UU3</originalsourceid><addsrcrecordid>eNqNjMEKgkAURd20iOofHq1sIYQW1FoMXdhGbRuv8aUD04zMPI3-ok9Oow9odQ_cw5l77wtZlgIVpElegp_KpoVEkWBrNOTmJpXkF5QWtZOOjd1ATYMUBE_JLbSTPhjF2BBYmhTU44m6BtLtxDXkWQF-TowqyLTrFY6ZoKCHFEbXvfhGHduRektLb3ZH5Wj124W3PiVlnAbUmSu5DgVp4mt8DsPt8bDbR1FVRX9JH0azTxo</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Vertical HEMT (High Electron Mobility Transistor) device with high voltage resistance and enhanced MIS (Metal-Insulator-Semiconductor) structure</title><source>esp@cenet</source><creator>YIN YIAN ; WANG JINYI ; ZOU BINGZHI</creator><creatorcontrib>YIN YIAN ; WANG JINYI ; ZOU BINGZHI</creatorcontrib><description>The utility model discloses a vertical HEMT (High Electron Mobility Transistor) device of a P-GaN gate with a high voltage withstanding and enhanced MIS (Metal-Insulator-Semiconductor) structure, which belongs to the technical field of semiconductor devices and comprises a drain electrode, source electrodes, the P-GaN gate, an AlGaN barrier layer and a substrate, the source electrodes are arranged at two sides of the P-GaN gate, the substrate is arranged below the AlGaN barrier layer, the drain electrode is arranged at the bottom of the substrate, and the P-GaN gate is arranged at the bottom of the substrate. A passivation layer is also arranged between the P-GaN gate and the source electrode; and the P-GaN gate comprises a gate electrode, a gate dielectric layer and a P-GaN layer which are sequentially arranged from top to bottom. According to the utility model, the defects in the prior art can be overcome, the introduction of the passivation layer can improve energy band distribution and realize large thres</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240517&DB=EPODOC&CC=CN&NR=220984533U$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240517&DB=EPODOC&CC=CN&NR=220984533U$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YIN YIAN</creatorcontrib><creatorcontrib>WANG JINYI</creatorcontrib><creatorcontrib>ZOU BINGZHI</creatorcontrib><title>Vertical HEMT (High Electron Mobility Transistor) device with high voltage resistance and enhanced MIS (Metal-Insulator-Semiconductor) structure</title><description>The utility model discloses a vertical HEMT (High Electron Mobility Transistor) device of a P-GaN gate with a high voltage withstanding and enhanced MIS (Metal-Insulator-Semiconductor) structure, which belongs to the technical field of semiconductor devices and comprises a drain electrode, source electrodes, the P-GaN gate, an AlGaN barrier layer and a substrate, the source electrodes are arranged at two sides of the P-GaN gate, the substrate is arranged below the AlGaN barrier layer, the drain electrode is arranged at the bottom of the substrate, and the P-GaN gate is arranged at the bottom of the substrate. A passivation layer is also arranged between the P-GaN gate and the source electrode; and the P-GaN gate comprises a gate electrode, a gate dielectric layer and a P-GaN layer which are sequentially arranged from top to bottom. According to the utility model, the defects in the prior art can be overcome, the introduction of the passivation layer can improve energy band distribution and realize large thres</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjMEKgkAURd20iOofHq1sIYQW1FoMXdhGbRuv8aUD04zMPI3-ok9Oow9odQ_cw5l77wtZlgIVpElegp_KpoVEkWBrNOTmJpXkF5QWtZOOjd1ATYMUBE_JLbSTPhjF2BBYmhTU44m6BtLtxDXkWQF-TowqyLTrFY6ZoKCHFEbXvfhGHduRektLb3ZH5Wj124W3PiVlnAbUmSu5DgVp4mt8DsPt8bDbR1FVRX9JH0azTxo</recordid><startdate>20240517</startdate><enddate>20240517</enddate><creator>YIN YIAN</creator><creator>WANG JINYI</creator><creator>ZOU BINGZHI</creator><scope>EVB</scope></search><sort><creationdate>20240517</creationdate><title>Vertical HEMT (High Electron Mobility Transistor) device with high voltage resistance and enhanced MIS (Metal-Insulator-Semiconductor) structure</title><author>YIN YIAN ; WANG JINYI ; ZOU BINGZHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN220984533UU3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>YIN YIAN</creatorcontrib><creatorcontrib>WANG JINYI</creatorcontrib><creatorcontrib>ZOU BINGZHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YIN YIAN</au><au>WANG JINYI</au><au>ZOU BINGZHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Vertical HEMT (High Electron Mobility Transistor) device with high voltage resistance and enhanced MIS (Metal-Insulator-Semiconductor) structure</title><date>2024-05-17</date><risdate>2024</risdate><abstract>The utility model discloses a vertical HEMT (High Electron Mobility Transistor) device of a P-GaN gate with a high voltage withstanding and enhanced MIS (Metal-Insulator-Semiconductor) structure, which belongs to the technical field of semiconductor devices and comprises a drain electrode, source electrodes, the P-GaN gate, an AlGaN barrier layer and a substrate, the source electrodes are arranged at two sides of the P-GaN gate, the substrate is arranged below the AlGaN barrier layer, the drain electrode is arranged at the bottom of the substrate, and the P-GaN gate is arranged at the bottom of the substrate. A passivation layer is also arranged between the P-GaN gate and the source electrode; and the P-GaN gate comprises a gate electrode, a gate dielectric layer and a P-GaN layer which are sequentially arranged from top to bottom. According to the utility model, the defects in the prior art can be overcome, the introduction of the passivation layer can improve energy band distribution and realize large thres</abstract><oa>free_for_read</oa></addata></record> |
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language | chi ; eng |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Vertical HEMT (High Electron Mobility Transistor) device with high voltage resistance and enhanced MIS (Metal-Insulator-Semiconductor) structure |
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