Chip, chip assembly and packaging body
The utility model discloses a chip, a chip assembly and a packaging body, and the chip is provided with at least one cavity which is used for accommodating at least one component connected with the chip. Through the above structure, the chip of the utility model can realize the accommodation of the...
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| creator | WANG LINA ZHENG LINGHUI |
| description | The utility model discloses a chip, a chip assembly and a packaging body, and the chip is provided with at least one cavity which is used for accommodating at least one component connected with the chip. Through the above structure, the chip of the utility model can realize the accommodation of the components through the arranged cavity, thereby reducing the installation space required by the components, reducing the size required by the installation of the chip and the components, and facilitating the miniaturization and portability.
本实用新型公开了芯片、芯片组件以及封装体，其中，芯片上设置有至少一个空腔，用于容置与芯片连接的至少一个元器件。通过上述结构，本实用新型的芯片能够通过所设置的空腔实现对元器件的容置，进而减少元器件所需的安装空间，并减少芯片与元器件安装所需的尺寸，便于小型化与轻便化。 |
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本实用新型公开了芯片、芯片组件以及封装体，其中，芯片上设置有至少一个空腔，用于容置与芯片连接的至少一个元器件。通过上述结构，本实用新型的芯片能够通过所设置的空腔实现对元器件的容置，进而减少元器件所需的安装空间，并减少芯片与元器件安装所需的尺寸，便于小型化与轻便化。</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221021&DB=EPODOC&CC=CN&NR=217641346U$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25555,76308</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221021&DB=EPODOC&CC=CN&NR=217641346U$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WANG LINA</creatorcontrib><creatorcontrib>ZHENG LINGHUI</creatorcontrib><title>Chip, chip assembly and packaging body</title><description>The utility model discloses a chip, a chip assembly and a packaging body, and the chip is provided with at least one cavity which is used for accommodating at least one component connected with the chip. Through the above structure, the chip of the utility model can realize the accommodation of the components through the arranged cavity, thereby reducing the installation space required by the components, reducing the size required by the installation of the chip and the components, and facilitating the miniaturization and portability.
本实用新型公开了芯片、芯片组件以及封装体，其中，芯片上设置有至少一个空腔，用于容置与芯片连接的至少一个元器件。通过上述结构，本实用新型的芯片能够通过所设置的空腔实现对元器件的容置，进而减少元器件所需的安装空间，并减少芯片与元器件安装所需的尺寸，便于小型化与轻便化。</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFBzzsgs0FFIBpIKicXFqblJOZUKiXkpCgWJydmJ6Zl56QpJ-SmVPAysaYk5xam8UJqbQcnNNcTZQze1ID8-tRioODUvtSTe2c_I0NzMxNDYxCw01JgoRQB6iCe_</recordid><startdate>20221021</startdate><enddate>20221021</enddate><creator>WANG LINA</creator><creator>ZHENG LINGHUI</creator><scope>EVB</scope></search><sort><creationdate>20221021</creationdate><title>Chip, chip assembly and packaging body</title><author>WANG LINA ; ZHENG LINGHUI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN217641346UU3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>WANG LINA</creatorcontrib><creatorcontrib>ZHENG LINGHUI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WANG LINA</au><au>ZHENG LINGHUI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Chip, chip assembly and packaging body</title><date>2022-10-21</date><risdate>2022</risdate><abstract>The utility model discloses a chip, a chip assembly and a packaging body, and the chip is provided with at least one cavity which is used for accommodating at least one component connected with the chip. Through the above structure, the chip of the utility model can realize the accommodation of the components through the arranged cavity, thereby reducing the installation space required by the components, reducing the size required by the installation of the chip and the components, and facilitating the miniaturization and portability.
本实用新型公开了芯片、芯片组件以及封装体，其中，芯片上设置有至少一个空腔，用于容置与芯片连接的至少一个元器件。通过上述结构，本实用新型的芯片能够通过所设置的空腔实现对元器件的容置，进而减少元器件所需的安装空间，并减少芯片与元器件安装所需的尺寸，便于小型化与轻便化。</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Chip, chip assembly and packaging body |
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