Power-on reset circuit
The utility model provides a power-on reset circuit, which comprises a current mirror circuit for providing bias, a first detection circuit for comparing a reference voltage with a set threshold voltage, a second detection circuit for detecting and comparing the reference voltage and a power supply...
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| creator | MA WENXIN LAI LIANZHANG |
| description | The utility model provides a power-on reset circuit, which comprises a current mirror circuit for providing bias, a first detection circuit for comparing a reference voltage with a set threshold voltage, a second detection circuit for detecting and comparing the reference voltage and a power supply voltage, and a third detection circuit for comparing the reference voltage with the set threshold voltage, wherein the input end of the first detection circuit is connected with the output end of the current mirror circuit; the Schmitt trigger is used for delaying; the phase inverter is used for driving; the first detection circuit and the second detection circuit are respectively arranged at the input end and the output end of the Schmitt trigger, and the phase inverter is arranged at the output end of the second detection circuit; the first detection circuit and the second detection circuit are both connected with a reference voltage Vref. Vref is larger than threshold voltage of an NMOS (N-channel Metal Oxide Se |
| format | Patent |
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Vref is larger than threshold voltage of an NMOS (N-channel Metal Oxide Se</description><language>chi ; eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220621&DB=EPODOC&CC=CN&NR=216794966U$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220621&DB=EPODOC&CC=CN&NR=216794966U$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MA WENXIN</creatorcontrib><creatorcontrib>LAI LIANZHANG</creatorcontrib><title>Power-on reset circuit</title><description>The utility model provides a power-on reset circuit, which comprises a current mirror circuit for providing bias, a first detection circuit for comparing a reference voltage with a set threshold voltage, a second detection circuit for detecting and comparing the reference voltage and a power supply voltage, and a third detection circuit for comparing the reference voltage with the set threshold voltage, wherein the input end of the first detection circuit is connected with the output end of the current mirror circuit; the Schmitt trigger is used for delaying; the phase inverter is used for driving; the first detection circuit and the second detection circuit are respectively arranged at the input end and the output end of the Schmitt trigger, and the phase inverter is arranged at the output end of the second detection circuit; the first detection circuit and the second detection circuit are both connected with a reference voltage Vref. Vref is larger than threshold voltage of an NMOS (N-channel Metal Oxide Se</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBALyC9PLdLNz1MoSi1OLVFIzixKLs0s4WFgTUvMKU7lhdLcDEpuriHOHrqpBfnxqcUFicmpeakl8c5-RoZm5pYmlmZmoaHGRCkCAOK9ImI</recordid><startdate>20220621</startdate><enddate>20220621</enddate><creator>MA WENXIN</creator><creator>LAI LIANZHANG</creator><scope>EVB</scope></search><sort><creationdate>20220621</creationdate><title>Power-on reset circuit</title><author>MA WENXIN ; LAI LIANZHANG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN216794966UU3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>MA WENXIN</creatorcontrib><creatorcontrib>LAI LIANZHANG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MA WENXIN</au><au>LAI LIANZHANG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Power-on reset circuit</title><date>2022-06-21</date><risdate>2022</risdate><abstract>The utility model provides a power-on reset circuit, which comprises a current mirror circuit for providing bias, a first detection circuit for comparing a reference voltage with a set threshold voltage, a second detection circuit for detecting and comparing the reference voltage and a power supply voltage, and a third detection circuit for comparing the reference voltage with the set threshold voltage, wherein the input end of the first detection circuit is connected with the output end of the current mirror circuit; the Schmitt trigger is used for delaying; the phase inverter is used for driving; the first detection circuit and the second detection circuit are respectively arranged at the input end and the output end of the Schmitt trigger, and the phase inverter is arranged at the output end of the second detection circuit; the first detection circuit and the second detection circuit are both connected with a reference voltage Vref. Vref is larger than threshold voltage of an NMOS (N-channel Metal Oxide Se</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE |
| title | Power-on reset circuit |
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