Lattice type VFD display screen protective circuit

A lattice type VFD display screen protective circuit comprises a resistor R1, a capacitor C1, a triode Q1, a resistor R4, a capacitor C2, a resistor R5, a resistor R7 and a triode Q2. Periodic clock signals CLKA emitted by a CPU control the base electrode of the triode Q1 through a blocking coupling...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: CAO YANG, HAN SHUSHENG
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:A lattice type VFD display screen protective circuit comprises a resistor R1, a capacitor C1, a triode Q1, a resistor R4, a capacitor C2, a resistor R5, a resistor R7 and a triode Q2. Periodic clock signals CLKA emitted by a CPU control the base electrode of the triode Q1 through a blocking coupling capacitor of the resistor R1 and the capacitor C1. A 5-volt power supply is connected with the emitter electrode of the triode Q1. The collector electrode of the triode Q1 is connected with the capacitor C2 through the resistor R4. The collector electrode of the triode Q1 is connected with the base electrode of the triode Q2 through the resistor R4 and the resistor R5. The 5-volt power supply is connected with the collector electrode of the triode Q2 through the resistor R7. The collector electrode of the triode Q2 is connected with the switch pin BKGO of a lattice type VFD display screen. The emitter electrode BKG of the triode Q2 is connected with the I/O pin of the CPU. By means of the clock pin CLKA which cont