Semiconductor device and method of manufacturing the same
A semiconductor device includes a substrate having active regions and field regions. A tunnel dielectric layer pattern is formed on the active regions. A first gate pattern is formed on the tunnel dielectric layer pattern to partially expose the tunnel dielectric layer pattern. A dielectric layer pa...
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description | A semiconductor device includes a substrate having active regions and field regions. A tunnel dielectric layer pattern is formed on the active regions. A first gate pattern is formed on the tunnel dielectric layer pattern to partially expose the tunnel dielectric layer pattern. A dielectric layer pattern is formed on the first gate pattern, the tunnel dielectric layer pattern and the field regions. The dielectric layer pattern includes a first dielectric layer pattern that extends in a first direction and a second dielectric layer pattern that extends in a second direction substantially perpendicular to the first direction. The first dielectric layer pattern is formed on the first gate pattern and the tunnel dielectric layer pattern. The second dielectric layer pattern is formed on the first gate pattern and the field regions. A second gate pattern is formed on the second dielectric layer pattern. |
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A first gate pattern is formed on the tunnel dielectric layer pattern to partially expose the tunnel dielectric layer pattern. A dielectric layer pattern is formed on the first gate pattern, the tunnel dielectric layer pattern and the field regions. The dielectric layer pattern includes a first dielectric layer pattern that extends in a first direction and a second dielectric layer pattern that extends in a second direction substantially perpendicular to the first direction. The first dielectric layer pattern is formed on the first gate pattern and the tunnel dielectric layer pattern. The second dielectric layer pattern is formed on the first gate pattern and the field regions. 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A second gate pattern is formed on the second dielectric layer pattern.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2006</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAMTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUchPU8hNzCtNS0wuKS3KzEtXKMlIVShOzE3lYWBNS8wpTuWF0twM8m6uIc4euqkF-fGpxQWJyal5qSXxzn6G5qYGRuZGjsaEVQAAlnct3w</recordid><startdate>20060322</startdate><enddate>20060322</enddate><creator>KWON SUNG-UN,HWANG JAE-SEUNG</creator><scope>EVB</scope></search><sort><creationdate>20060322</creationdate><title>Semiconductor device and method of manufacturing the same</title><author>KWON SUNG-UN,HWANG JAE-SEUNG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN1750272A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2006</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KWON SUNG-UN,HWANG JAE-SEUNG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KWON SUNG-UN,HWANG JAE-SEUNG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and method of manufacturing the same</title><date>2006-03-22</date><risdate>2006</risdate><abstract>A semiconductor device includes a substrate having active regions and field regions. A tunnel dielectric layer pattern is formed on the active regions. A first gate pattern is formed on the tunnel dielectric layer pattern to partially expose the tunnel dielectric layer pattern. A dielectric layer pattern is formed on the first gate pattern, the tunnel dielectric layer pattern and the field regions. The dielectric layer pattern includes a first dielectric layer pattern that extends in a first direction and a second dielectric layer pattern that extends in a second direction substantially perpendicular to the first direction. The first dielectric layer pattern is formed on the first gate pattern and the tunnel dielectric layer pattern. The second dielectric layer pattern is formed on the first gate pattern and the field regions. A second gate pattern is formed on the second dielectric layer pattern.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor device and method of manufacturing the same |
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