Method for manufacturing semiconductor device
In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and Y as a deposi...
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creator | IINO TOMOHISA,FUKUMAKI NAOMI,KATO YOSHITAKE,YAMAMOTO TOMOE |
description | In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and Y as a deposition gas. The process for manufacturing a capacitor of the present invention includes obtaining a boundary temperature T (degree C.), at which an increase in a deposition rate for depositing the capacitor dielectric film as increasing the temperature is detected, on the basis of a correlation data of a deposition temperature in the atomic layer deposition employing the deposition gas with a deposition rate for depositing the capacitor dielectric film at the deposition temperature (S100 and S102); and depositing the capacitor dielectric film via the atomic layer deposition employing the deposition gas at a temperature within a range of from (T-20) (degree C.) to (T+20) (degree C.) (S104 to S112). |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN1741266A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN1741266A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN1741266A3</originalsourceid><addsrcrecordid>eNrjZND1TS3JyE9RSMsvUshNzCtNS0wuKS3KzEtXKE7NzUzOz0spTS4ByqWklmUmp_IwsKYl5hSn8kJpbgZ5N9cQZw_d1IL8-NTigsTk1LzUknhnP0NzE0MjMzNHY8IqAFNZKdE</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for manufacturing semiconductor device</title><source>esp@cenet</source><creator>IINO TOMOHISA,FUKUMAKI NAOMI,KATO YOSHITAKE,YAMAMOTO TOMOE</creator><creatorcontrib>IINO TOMOHISA,FUKUMAKI NAOMI,KATO YOSHITAKE,YAMAMOTO TOMOE</creatorcontrib><description>In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and Y as a deposition gas. The process for manufacturing a capacitor of the present invention includes obtaining a boundary temperature T (degree C.), at which an increase in a deposition rate for depositing the capacitor dielectric film as increasing the temperature is detected, on the basis of a correlation data of a deposition temperature in the atomic layer deposition employing the deposition gas with a deposition rate for depositing the capacitor dielectric film at the deposition temperature (S100 and S102); and depositing the capacitor dielectric film via the atomic layer deposition employing the deposition gas at a temperature within a range of from (T-20) (degree C.) to (T+20) (degree C.) (S104 to S112).</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2006</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20060301&DB=EPODOC&CC=CN&NR=1741266A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20060301&DB=EPODOC&CC=CN&NR=1741266A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>IINO TOMOHISA,FUKUMAKI NAOMI,KATO YOSHITAKE,YAMAMOTO TOMOE</creatorcontrib><title>Method for manufacturing semiconductor device</title><description>In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and Y as a deposition gas. The process for manufacturing a capacitor of the present invention includes obtaining a boundary temperature T (degree C.), at which an increase in a deposition rate for depositing the capacitor dielectric film as increasing the temperature is detected, on the basis of a correlation data of a deposition temperature in the atomic layer deposition employing the deposition gas with a deposition rate for depositing the capacitor dielectric film at the deposition temperature (S100 and S102); and depositing the capacitor dielectric film via the atomic layer deposition employing the deposition gas at a temperature within a range of from (T-20) (degree C.) to (T+20) (degree C.) (S104 to S112).</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2006</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND1TS3JyE9RSMsvUshNzCtNS0wuKS3KzEtXKE7NzUzOz0spTS4ByqWklmUmp_IwsKYl5hSn8kJpbgZ5N9cQZw_d1IL8-NTigsTk1LzUknhnP0NzE0MjMzNHY8IqAFNZKdE</recordid><startdate>20060301</startdate><enddate>20060301</enddate><creator>IINO TOMOHISA,FUKUMAKI NAOMI,KATO YOSHITAKE,YAMAMOTO TOMOE</creator><scope>EVB</scope></search><sort><creationdate>20060301</creationdate><title>Method for manufacturing semiconductor device</title><author>IINO TOMOHISA,FUKUMAKI NAOMI,KATO YOSHITAKE,YAMAMOTO TOMOE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN1741266A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2006</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>IINO TOMOHISA,FUKUMAKI NAOMI,KATO YOSHITAKE,YAMAMOTO TOMOE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>IINO TOMOHISA,FUKUMAKI NAOMI,KATO YOSHITAKE,YAMAMOTO TOMOE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for manufacturing semiconductor device</title><date>2006-03-01</date><risdate>2006</risdate><abstract>In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and Y as a deposition gas. The process for manufacturing a capacitor of the present invention includes obtaining a boundary temperature T (degree C.), at which an increase in a deposition rate for depositing the capacitor dielectric film as increasing the temperature is detected, on the basis of a correlation data of a deposition temperature in the atomic layer deposition employing the deposition gas with a deposition rate for depositing the capacitor dielectric film at the deposition temperature (S100 and S102); and depositing the capacitor dielectric film via the atomic layer deposition employing the deposition gas at a temperature within a range of from (T-20) (degree C.) to (T+20) (degree C.) (S104 to S112).</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Method for manufacturing semiconductor device |
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