Method of forming shallow trench isolation structure in a semiconductor device

A method for fabricating a shallow trench isolation structure is described, in which a bottom pad oxide layer, a middle silicon nitride layer, a middle oxide layer and a top silicon nitride layer are sequentially formed on a silicon substrate. Photolithographic masking and anisotropic etching are th...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	LARSEN BRADLEY J.,KELKAR AMIT S.,DEGORS NICOLAS,ERICKSON DONALD A.,BARRY TIMOTHY M
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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