Making process of channel separating zone
The method for making channel isolation region is characterized by that it utilizes microimage and etching process to limit a channel isolation region, and utilizes preparation of spacing wall to form a spacing wall between two sides of channel isolatiion region to eliminate sharp crossover angle be...
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creator | ZEYI LU BAIHAN REN YALING HONG |
description | The method for making channel isolation region is characterized by that it utilizes microimage and etching process to limit a channel isolation region, and utilizes preparation of spacing wall to form a spacing wall between two sides of channel isolatiion region to eliminate sharp crossover angle between the channel isolation region and an adjacent active region on the silicon base material, and further increase etching process window of next gate-pole polycrystalline silicon, reduce residue of polycrystalline silicon in said cross over angle and can reduce the danger of gate-pole short circuit. |
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ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020807&DB=EPODOC&CC=CN&NR=1362734A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020807&DB=EPODOC&CC=CN&NR=1362734A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ZEYI LU</creatorcontrib><creatorcontrib>BAIHAN REN</creatorcontrib><creatorcontrib>YALING HONG</creatorcontrib><title>Making process of channel separating zone</title><description>The method for making channel isolation region is characterized by that it utilizes microimage and etching process to limit a channel isolation region, and utilizes preparation of spacing wall to form a spacing wall between two sides of channel isolatiion region to eliminate sharp crossover angle between the channel isolation region and an adjacent active region on the silicon base material, and further increase etching process window of next gate-pole polycrystalline silicon, reduce residue of polycrystalline silicon in said cross over angle and can reduce the danger of gate-pole short circuit.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND0TczOzEtXKCjKT04tLlbIT1NIzkjMy0vNUShOLUgsSiwByVbl56XyMLCmJeYUp_JCaW4GeTfXEGcP3dSC_PjU4oLE5NS81JJ4Zz9DYzMjc2MTR2PCKgBdQyfO</recordid><startdate>20020807</startdate><enddate>20020807</enddate><creator>ZEYI LU</creator><creator>BAIHAN REN</creator><creator>YALING HONG</creator><scope>EVB</scope></search><sort><creationdate>20020807</creationdate><title>Making process of channel separating zone</title><author>ZEYI LU ; BAIHAN REN ; YALING HONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN1362734A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>ZEYI LU</creatorcontrib><creatorcontrib>BAIHAN REN</creatorcontrib><creatorcontrib>YALING HONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ZEYI LU</au><au>BAIHAN REN</au><au>YALING HONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Making process of channel separating zone</title><date>2002-08-07</date><risdate>2002</risdate><abstract>The method for making channel isolation region is characterized by that it utilizes microimage and etching process to limit a channel isolation region, and utilizes preparation of spacing wall to form a spacing wall between two sides of channel isolatiion region to eliminate sharp crossover angle between the channel isolation region and an adjacent active region on the silicon base material, and further increase etching process window of next gate-pole polycrystalline silicon, reduce residue of polycrystalline silicon in said cross over angle and can reduce the danger of gate-pole short circuit.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Making process of channel separating zone |
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