Multiple mode power throttle mechanism

Multiple mode power throttle mechanism

A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: RUSU STEFAN,TIWARI VIVEK,BURNS JAMES,AYERS DAVID,ENG MARSHA,GROCHOWSKI EDWARD
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator RUSU STEFAN,TIWARI VIVEK,BURNS JAMES,AYERS DAVID,ENG MARSHA,GROCHOWSKI EDWARD
description A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN1303497CC</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN1303497CC</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN1303497CC3</originalsourceid><addsrcrecordid>eNrjZFDzLc0pySzISVXIzU9JVSjIL08tUijJKMovKQGJpSZnJOZlFufyMLCmJeYUp_JCaW4GBTfXEGcP3dSC_PjU4oLE5NS81JJ4Zz9DYwNjE0tzZ2djIpQAAESRJ5Q</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Multiple mode power throttle mechanism</title><source>esp@cenet</source><creator>RUSU STEFAN,TIWARI VIVEK,BURNS JAMES,AYERS DAVID,ENG MARSHA,GROCHOWSKI EDWARD</creator><creatorcontrib>RUSU STEFAN,TIWARI VIVEK,BURNS JAMES,AYERS DAVID,ENG MARSHA,GROCHOWSKI EDWARD</creatorcontrib><description>A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20070307&amp;DB=EPODOC&amp;CC=CN&amp;NR=1303497C$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20070307&amp;DB=EPODOC&amp;CC=CN&amp;NR=1303497C$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>RUSU STEFAN,TIWARI VIVEK,BURNS JAMES,AYERS DAVID,ENG MARSHA,GROCHOWSKI EDWARD</creatorcontrib><title>Multiple mode power throttle mechanism</title><description>A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFDzLc0pySzISVXIzU9JVSjIL08tUijJKMovKQGJpSZnJOZlFufyMLCmJeYUp_JCaW4GBTfXEGcP3dSC_PjU4oLE5NS81JJ4Zz9DYwNjE0tzZ2djIpQAAESRJ5Q</recordid><startdate>20070307</startdate><enddate>20070307</enddate><creator>RUSU STEFAN,TIWARI VIVEK,BURNS JAMES,AYERS DAVID,ENG MARSHA,GROCHOWSKI EDWARD</creator><scope>EVB</scope></search><sort><creationdate>20070307</creationdate><title>Multiple mode power throttle mechanism</title><author>RUSU STEFAN,TIWARI VIVEK,BURNS JAMES,AYERS DAVID,ENG MARSHA,GROCHOWSKI EDWARD</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN1303497CC3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>RUSU STEFAN,TIWARI VIVEK,BURNS JAMES,AYERS DAVID,ENG MARSHA,GROCHOWSKI EDWARD</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>RUSU STEFAN,TIWARI VIVEK,BURNS JAMES,AYERS DAVID,ENG MARSHA,GROCHOWSKI EDWARD</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Multiple mode power throttle mechanism</title><date>2007-03-07</date><risdate>2007</risdate><abstract>A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_CN1303497CC
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Multiple mode power throttle mechanism
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T10%3A42%3A15IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=RUSU%20STEFAN,TIWARI%20VIVEK,BURNS%20JAMES,AYERS%20DAVID,ENG%20MARSHA,GROCHOWSKI%20EDWARD&rft.date=2007-03-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN1303497CC%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true