Memory management system and method providing linear address based memory access security
A memory management unit (MMU) is disclosed for managing a memory storing data arranged within a plurality of memory pages. The MMU includes a security check unit (SCU) receiving a linear address generated during execution of a current instruction. The linear address has a corresponding physical add...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | BARNES BRIAN C.,STRONGIN GEOFFREY S.,SCHMIDT RODNEY W |
| description | A memory management unit (MMU) is disclosed for managing a memory storing data arranged within a plurality of memory pages. The MMU includes a security check unit (SCU) receiving a linear address generated during execution of a current instruction. The linear address has a corresponding physical address residing within a selected memory page. The SCU uses the linear address to access one or more security attribute data structures located in the memory to obtain a security attribute of the selected memory page. The SCU compares a numerical value conveyed by a security attribute of the current instruction to a numerical value conveyed by the security attribute of the selected memory page, and produces an output signal dependent upon a result of the comparison. The MMU accesses the selected memory page dependent upon the output signal. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN1278244CC</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN1278244CC</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN1278244CC3</originalsourceid><addsrcrecordid>eNqNjLEKAjEQBa-xEPUf9gcsPA-0D4qNVjZWx5o8z8BlE7JRyN_LiR9gNTAMM29uZ4SYKwUWHhAghbRqQSAWRwHlGR2lHN_eeRlo9ALOxM5lqNKdFVP1XbC1k1PYV_alLpvZg0fF6sdFQ8fD1ZzWSLGHJrYQlN5cNu1u33adMds_kg-_4TsE</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Memory management system and method providing linear address based memory access security</title><source>esp@cenet</source><creator>BARNES BRIAN C.,STRONGIN GEOFFREY S.,SCHMIDT RODNEY W</creator><creatorcontrib>BARNES BRIAN C.,STRONGIN GEOFFREY S.,SCHMIDT RODNEY W</creatorcontrib><description>A memory management unit (MMU) is disclosed for managing a memory storing data arranged within a plurality of memory pages. The MMU includes a security check unit (SCU) receiving a linear address generated during execution of a current instruction. The linear address has a corresponding physical address residing within a selected memory page. The SCU uses the linear address to access one or more security attribute data structures located in the memory to obtain a security attribute of the selected memory page. The SCU compares a numerical value conveyed by a security attribute of the current instruction to a numerical value conveyed by the security attribute of the selected memory page, and produces an output signal dependent upon a result of the comparison. The MMU accesses the selected memory page dependent upon the output signal.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2006</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20061004&DB=EPODOC&CC=CN&NR=1278244C$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20061004&DB=EPODOC&CC=CN&NR=1278244C$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BARNES BRIAN C.,STRONGIN GEOFFREY S.,SCHMIDT RODNEY W</creatorcontrib><title>Memory management system and method providing linear address based memory access security</title><description>A memory management unit (MMU) is disclosed for managing a memory storing data arranged within a plurality of memory pages. The MMU includes a security check unit (SCU) receiving a linear address generated during execution of a current instruction. The linear address has a corresponding physical address residing within a selected memory page. The SCU uses the linear address to access one or more security attribute data structures located in the memory to obtain a security attribute of the selected memory page. The SCU compares a numerical value conveyed by a security attribute of the current instruction to a numerical value conveyed by the security attribute of the selected memory page, and produces an output signal dependent upon a result of the comparison. The MMU accesses the selected memory page dependent upon the output signal.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2006</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjLEKAjEQBa-xEPUf9gcsPA-0D4qNVjZWx5o8z8BlE7JRyN_LiR9gNTAMM29uZ4SYKwUWHhAghbRqQSAWRwHlGR2lHN_eeRlo9ALOxM5lqNKdFVP1XbC1k1PYV_alLpvZg0fF6sdFQ8fD1ZzWSLGHJrYQlN5cNu1u33adMds_kg-_4TsE</recordid><startdate>20061004</startdate><enddate>20061004</enddate><creator>BARNES BRIAN C.,STRONGIN GEOFFREY S.,SCHMIDT RODNEY W</creator><scope>EVB</scope></search><sort><creationdate>20061004</creationdate><title>Memory management system and method providing linear address based memory access security</title><author>BARNES BRIAN C.,STRONGIN GEOFFREY S.,SCHMIDT RODNEY W</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN1278244CC3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2006</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>BARNES BRIAN C.,STRONGIN GEOFFREY S.,SCHMIDT RODNEY W</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BARNES BRIAN C.,STRONGIN GEOFFREY S.,SCHMIDT RODNEY W</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Memory management system and method providing linear address based memory access security</title><date>2006-10-04</date><risdate>2006</risdate><abstract>A memory management unit (MMU) is disclosed for managing a memory storing data arranged within a plurality of memory pages. The MMU includes a security check unit (SCU) receiving a linear address generated during execution of a current instruction. The linear address has a corresponding physical address residing within a selected memory page. The SCU uses the linear address to access one or more security attribute data structures located in the memory to obtain a security attribute of the selected memory page. The SCU compares a numerical value conveyed by a security attribute of the current instruction to a numerical value conveyed by the security attribute of the selected memory page, and produces an output signal dependent upon a result of the comparison. The MMU accesses the selected memory page dependent upon the output signal.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_CN1278244CC |
| source | esp@cenet |
| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Memory management system and method providing linear address based memory access security |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T17%3A11%3A41IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BARNES%20BRIAN%20C.,STRONGIN%20GEOFFREY%20S.,SCHMIDT%20RODNEY%20W&rft.date=2006-10-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN1278244CC%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |