Current mirror circuit, integrated circuit and device for reproducing optical recording carrier

A current mirror circuit is described which includes a current input terminal (14A), a current output terminal (14B) and a common terminal (14C). A first controllable semiconductor element (T1) is arranged between the current input terminal (14A) and the common terminal (14C). A second controllable semiconductor element (T2) is arranged between the current output terminal (14B) and the common terminal (14C). The controllable semiconductor elements (T1, T2) havie interconnected control electrodes (T1A, T2A) which are also coupled to a bias voltage source (VBIAS), for biasing said control electrodes at a reference voltage. The circuit further includes a transconductance stage (12) with an input (12A) coupled to the current input terminal (14A) and an output (12B) coupled to the common terminal (14C). The control electrodes (T1A, T2A) are coupled to the common terminal (14C) via a third controllable semiconductor element (T3). The bias voltage source (VBIAS) is coupled to the control electrodes of the first and the second controllable semiconductor element (T1, T2) via a control electrode (T3A) of the third controllable semiconductor element (T3). The current mirror circuit has a high bandwidth also at low input currents and is very suitable for application in an arrangement for reproducing an optical record carrier.