Digital array signal processing superstructure chip, arithmetic unit and super arithmetic unit

The invention discloses a digital array signal processing superstructure chip, an arithmetic unit and a superarithmetic unit. The superstructure chip comprises a multi-channel communication interface used for receiving acquired data; the dynamic random access memory is interconnected with the multi-channel communication interface and is used for storing acquired data and data after beam forming; the reconfigurable computing array is connected with the dynamic random access memory through various data lines and address lines and is used for carrying out matrix operation on the acquired data according to a beam forming algorithm; the reconfigurable computing array comprises a plurality of super computing units capable of performing real number operation and/or complex number operation, and the super computing units comprise a plurality of computing units capable of performing real number operation; both the arithmetic unit and the super arithmetic unit can adjust the data transmission link and/or the connection