Semiconductor device including trench transistor cell
The invention relates to a semiconductor device including a trench transistor cell. A semiconductor device is presented. The semiconductor device includes a semiconductor body including an array of trench transistor cells. The trench transistor cell array includes a first trench transistor cell unit...
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| creator | PFIRSCH FRANK PHILIPPE ANTOINE BARBOSKE RONALD NIEDERNOSTAD, FREDRIK, J |
| description | The invention relates to a semiconductor device including a trench transistor cell. A semiconductor device is presented. The semiconductor device includes a semiconductor body including an array of trench transistor cells. The trench transistor cell array includes a first trench transistor cell unit and a second trench transistor cell unit. The transistor cells based on the first trench transistor cell unit and the transistor cells based on the second trench transistor cell unit are electrically connected in parallel. The first trench transistor cell includes a first threshold voltage. The second trench transistor cell unit includes a second threshold voltage greater than the first threshold voltage. The absolute value of dU/dt when the nominal current of the array of transistor cells is turned on is at least 50% of the absolute value of dU/dt when 10% of the nominal current of the array of transistor cells is turned on, dU/dt being a time derivative of the voltage U between the load terminals of the array of |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN118630056A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN118630056A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN118630056A3</originalsourceid><addsrcrecordid>eNrjZDANTs3NTM7PSylNLskvUkhJLctMTlXIzEvOKU3JzEtXKClKzUvOAFKJecWZxSAlyak5OTwMrGmJOcWpvFCam0HRzTXE2UM3tSA_PrW4IDE5NS-1JN7Zz9DQwszYwMDUzNGYGDUArtUtwQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device including trench transistor cell</title><source>esp@cenet</source><creator>PFIRSCH FRANK ; PHILIPPE ANTOINE ; BARBOSKE RONALD ; NIEDERNOSTAD, FREDRIK, J</creator><creatorcontrib>PFIRSCH FRANK ; PHILIPPE ANTOINE ; BARBOSKE RONALD ; NIEDERNOSTAD, FREDRIK, J</creatorcontrib><description>The invention relates to a semiconductor device including a trench transistor cell. A semiconductor device is presented. The semiconductor device includes a semiconductor body including an array of trench transistor cells. The trench transistor cell array includes a first trench transistor cell unit and a second trench transistor cell unit. The transistor cells based on the first trench transistor cell unit and the transistor cells based on the second trench transistor cell unit are electrically connected in parallel. The first trench transistor cell includes a first threshold voltage. The second trench transistor cell unit includes a second threshold voltage greater than the first threshold voltage. The absolute value of dU/dt when the nominal current of the array of transistor cells is turned on is at least 50% of the absolute value of dU/dt when 10% of the nominal current of the array of transistor cells is turned on, dU/dt being a time derivative of the voltage U between the load terminals of the array of</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240910&DB=EPODOC&CC=CN&NR=118630056A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240910&DB=EPODOC&CC=CN&NR=118630056A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>PFIRSCH FRANK</creatorcontrib><creatorcontrib>PHILIPPE ANTOINE</creatorcontrib><creatorcontrib>BARBOSKE RONALD</creatorcontrib><creatorcontrib>NIEDERNOSTAD, FREDRIK, J</creatorcontrib><title>Semiconductor device including trench transistor cell</title><description>The invention relates to a semiconductor device including a trench transistor cell. A semiconductor device is presented. The semiconductor device includes a semiconductor body including an array of trench transistor cells. The trench transistor cell array includes a first trench transistor cell unit and a second trench transistor cell unit. The transistor cells based on the first trench transistor cell unit and the transistor cells based on the second trench transistor cell unit are electrically connected in parallel. The first trench transistor cell includes a first threshold voltage. The second trench transistor cell unit includes a second threshold voltage greater than the first threshold voltage. The absolute value of dU/dt when the nominal current of the array of transistor cells is turned on is at least 50% of the absolute value of dU/dt when 10% of the nominal current of the array of transistor cells is turned on, dU/dt being a time derivative of the voltage U between the load terminals of the array of</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDANTs3NTM7PSylNLskvUkhJLctMTlXIzEvOKU3JzEtXKClKzUvOAFKJecWZxSAlyak5OTwMrGmJOcWpvFCam0HRzTXE2UM3tSA_PrW4IDE5NS-1JN7Zz9DQwszYwMDUzNGYGDUArtUtwQ</recordid><startdate>20240910</startdate><enddate>20240910</enddate><creator>PFIRSCH FRANK</creator><creator>PHILIPPE ANTOINE</creator><creator>BARBOSKE RONALD</creator><creator>NIEDERNOSTAD, FREDRIK, J</creator><scope>EVB</scope></search><sort><creationdate>20240910</creationdate><title>Semiconductor device including trench transistor cell</title><author>PFIRSCH FRANK ; PHILIPPE ANTOINE ; BARBOSKE RONALD ; NIEDERNOSTAD, FREDRIK, J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN118630056A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>PFIRSCH FRANK</creatorcontrib><creatorcontrib>PHILIPPE ANTOINE</creatorcontrib><creatorcontrib>BARBOSKE RONALD</creatorcontrib><creatorcontrib>NIEDERNOSTAD, FREDRIK, J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>PFIRSCH FRANK</au><au>PHILIPPE ANTOINE</au><au>BARBOSKE RONALD</au><au>NIEDERNOSTAD, FREDRIK, J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device including trench transistor cell</title><date>2024-09-10</date><risdate>2024</risdate><abstract>The invention relates to a semiconductor device including a trench transistor cell. A semiconductor device is presented. The semiconductor device includes a semiconductor body including an array of trench transistor cells. The trench transistor cell array includes a first trench transistor cell unit and a second trench transistor cell unit. The transistor cells based on the first trench transistor cell unit and the transistor cells based on the second trench transistor cell unit are electrically connected in parallel. The first trench transistor cell includes a first threshold voltage. The second trench transistor cell unit includes a second threshold voltage greater than the first threshold voltage. The absolute value of dU/dt when the nominal current of the array of transistor cells is turned on is at least 50% of the absolute value of dU/dt when 10% of the nominal current of the array of transistor cells is turned on, dU/dt being a time derivative of the voltage U between the load terminals of the array of</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Semiconductor device including trench transistor cell |
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