Transistor, preparation method thereof and electronic device
The invention provides a transistor, a preparation method thereof and an electronic device. The transistor comprises a substrate; the whole surface of the channel layer is arranged on one side of the substrate; the grid electrode is arranged on a part of one side, far away from the substrate, of the...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a transistor, a preparation method thereof and an electronic device. The transistor comprises a substrate; the whole surface of the channel layer is arranged on one side of the substrate; the grid electrode is arranged on a part of one side, far away from the substrate, of the channel layer; the first barrier layer is located between the channel layer and the layer where the grid electrode is located, and the orthographic projection of the first barrier layer on the substrate is located in the orthographic projection of the grid electrode on the substrate; the p-type heavily doped layer is arranged between the first barrier layer and the grid electrode in a stacked manner; the second barrier layer is located on the side, away from the substrate, of the channel layer, and the second barrier layer covers at least part of the channel layer outside the first barrier layer. The problems of performance degradation of the HEMT with the P-type gate structure, such as current collapse effect, dy |
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