Anti-creeping high-speed inverter circuit and working method thereof
The invention discloses an anti-creeping high-speed inverter circuit and a working method thereof. The anti-creeping high-speed inverter circuit comprises an MP1 transistor, an MN1 transistor, an MP2 transistor, an MN2 transistor, a level conversion circuit and an IN input signal line, the grid elec...
Gespeichert in:
Hauptverfasser: | , , , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | HU WEIBO CUI HAITAO ZHAO JIANWEI WU DIYANG YAN XIANG YANG SHANGZHENG QIN KEFAN |
description | The invention discloses an anti-creeping high-speed inverter circuit and a working method thereof. The anti-creeping high-speed inverter circuit comprises an MP1 transistor, an MN1 transistor, an MP2 transistor, an MN2 transistor, a level conversion circuit and an IN input signal line, the grid electrode of the MP1 transistor and the grid electrode of the MN1 transistor are electrically connected with an IN input signal line at the same time, and the drain electrode of the MP1 transistor and the drain electrode of the MN1 transistor are electrically connected with an OUT output signal line together. The drain electrode of the MP2 transistor is electrically connected with the source electrode of the MP1 transistor, the drain electrode of the MN2 transistor is electrically connected with the source electrode of the MN1 transistor, and the IN input signal line is electrically connected with the input end of the level conversion circuit. An OUT1 signal which is output by the level conversion circuit and is subjec |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN118449493A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN118449493A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN118449493A3</originalsourceid><addsrcrecordid>eNqNyjEOwiAUBmAWB6Pe4XkAhqYMdmyqxsnJvSHwt5AqkMdTr29MPIDTt3xrdeyTRO0YKDHNFOIcdC2Ap5heYAGTi-yeUcgmT-_My_c9ICF7kgBGnrZqNdl7xe7nRu3Pp9tw0Sh5RC3WIUHG4do0B2M607V9-8_5AMSuMwk</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Anti-creeping high-speed inverter circuit and working method thereof</title><source>esp@cenet</source><creator>HU WEIBO ; CUI HAITAO ; ZHAO JIANWEI ; WU DIYANG ; YAN XIANG ; YANG SHANGZHENG ; QIN KEFAN</creator><creatorcontrib>HU WEIBO ; CUI HAITAO ; ZHAO JIANWEI ; WU DIYANG ; YAN XIANG ; YANG SHANGZHENG ; QIN KEFAN</creatorcontrib><description>The invention discloses an anti-creeping high-speed inverter circuit and a working method thereof. The anti-creeping high-speed inverter circuit comprises an MP1 transistor, an MN1 transistor, an MP2 transistor, an MN2 transistor, a level conversion circuit and an IN input signal line, the grid electrode of the MP1 transistor and the grid electrode of the MN1 transistor are electrically connected with an IN input signal line at the same time, and the drain electrode of the MP1 transistor and the drain electrode of the MN1 transistor are electrically connected with an OUT output signal line together. The drain electrode of the MP2 transistor is electrically connected with the source electrode of the MP1 transistor, the drain electrode of the MN2 transistor is electrically connected with the source electrode of the MN1 transistor, and the IN input signal line is electrically connected with the input end of the level conversion circuit. An OUT1 signal which is output by the level conversion circuit and is subjec</description><language>chi ; eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240806&DB=EPODOC&CC=CN&NR=118449493A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240806&DB=EPODOC&CC=CN&NR=118449493A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HU WEIBO</creatorcontrib><creatorcontrib>CUI HAITAO</creatorcontrib><creatorcontrib>ZHAO JIANWEI</creatorcontrib><creatorcontrib>WU DIYANG</creatorcontrib><creatorcontrib>YAN XIANG</creatorcontrib><creatorcontrib>YANG SHANGZHENG</creatorcontrib><creatorcontrib>QIN KEFAN</creatorcontrib><title>Anti-creeping high-speed inverter circuit and working method thereof</title><description>The invention discloses an anti-creeping high-speed inverter circuit and a working method thereof. The anti-creeping high-speed inverter circuit comprises an MP1 transistor, an MN1 transistor, an MP2 transistor, an MN2 transistor, a level conversion circuit and an IN input signal line, the grid electrode of the MP1 transistor and the grid electrode of the MN1 transistor are electrically connected with an IN input signal line at the same time, and the drain electrode of the MP1 transistor and the drain electrode of the MN1 transistor are electrically connected with an OUT output signal line together. The drain electrode of the MP2 transistor is electrically connected with the source electrode of the MP1 transistor, the drain electrode of the MN2 transistor is electrically connected with the source electrode of the MN1 transistor, and the IN input signal line is electrically connected with the input end of the level conversion circuit. An OUT1 signal which is output by the level conversion circuit and is subjec</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyjEOwiAUBmAWB6Pe4XkAhqYMdmyqxsnJvSHwt5AqkMdTr29MPIDTt3xrdeyTRO0YKDHNFOIcdC2Ap5heYAGTi-yeUcgmT-_My_c9ICF7kgBGnrZqNdl7xe7nRu3Pp9tw0Sh5RC3WIUHG4do0B2M607V9-8_5AMSuMwk</recordid><startdate>20240806</startdate><enddate>20240806</enddate><creator>HU WEIBO</creator><creator>CUI HAITAO</creator><creator>ZHAO JIANWEI</creator><creator>WU DIYANG</creator><creator>YAN XIANG</creator><creator>YANG SHANGZHENG</creator><creator>QIN KEFAN</creator><scope>EVB</scope></search><sort><creationdate>20240806</creationdate><title>Anti-creeping high-speed inverter circuit and working method thereof</title><author>HU WEIBO ; CUI HAITAO ; ZHAO JIANWEI ; WU DIYANG ; YAN XIANG ; YANG SHANGZHENG ; QIN KEFAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN118449493A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>HU WEIBO</creatorcontrib><creatorcontrib>CUI HAITAO</creatorcontrib><creatorcontrib>ZHAO JIANWEI</creatorcontrib><creatorcontrib>WU DIYANG</creatorcontrib><creatorcontrib>YAN XIANG</creatorcontrib><creatorcontrib>YANG SHANGZHENG</creatorcontrib><creatorcontrib>QIN KEFAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HU WEIBO</au><au>CUI HAITAO</au><au>ZHAO JIANWEI</au><au>WU DIYANG</au><au>YAN XIANG</au><au>YANG SHANGZHENG</au><au>QIN KEFAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Anti-creeping high-speed inverter circuit and working method thereof</title><date>2024-08-06</date><risdate>2024</risdate><abstract>The invention discloses an anti-creeping high-speed inverter circuit and a working method thereof. The anti-creeping high-speed inverter circuit comprises an MP1 transistor, an MN1 transistor, an MP2 transistor, an MN2 transistor, a level conversion circuit and an IN input signal line, the grid electrode of the MP1 transistor and the grid electrode of the MN1 transistor are electrically connected with an IN input signal line at the same time, and the drain electrode of the MP1 transistor and the drain electrode of the MN1 transistor are electrically connected with an OUT output signal line together. The drain electrode of the MP2 transistor is electrically connected with the source electrode of the MP1 transistor, the drain electrode of the MN2 transistor is electrically connected with the source electrode of the MN1 transistor, and the IN input signal line is electrically connected with the input end of the level conversion circuit. An OUT1 signal which is output by the level conversion circuit and is subjec</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_CN118449493A |
source | esp@cenet |
subjects | BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE |
title | Anti-creeping high-speed inverter circuit and working method thereof |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T08%3A42%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HU%20WEIBO&rft.date=2024-08-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN118449493A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |