Parity check protection of control registers

An integrated circuit (IC) device for detecting an error within a register includes a register and a parity check circuit. The parity check circuit is coupled to the register and includes a first parity circuit, a second parity circuit, and an error detection circuit. A first parity circuit receives a first register value from a register and determines a first value from the first register value. A second parity circuit receives a second register value from the register and determines a second value from the second register value. The error detection circuit compares the first value and the second value to detect a first error within the register, and outputs an error signal indicating the first error. 一种用于检测寄存器内的错误的集成电路(IC)器件，该IC器件包括寄存器和奇偶校验检查电路。该奇偶校验检查电路耦接到寄存器，并且包括第一奇偶校验电路、第二奇偶校验电路和错误检测电路。第一奇偶校验电路接收来自寄存器的第一寄存器值以及确定来自该第一寄存器值的第一值。第二奇偶校验电路接收来自寄存器的第二寄存器值以及确定来自该第二寄存器值的第二值。错误检测电路比较第一值和第二值以检测寄存器内的第一错误，以及输出指示第一错误的错误信号。