Ciphertext calculation accelerator, ciphertext calculation instruction processing method and device and medium

The invention provides a ciphertext calculation accelerator, a ciphertext calculation instruction processing method and device and a medium, and belongs to the technical field of data processing. The method comprises the following steps: storing a ciphertext calculation instruction into a first-level cache SRAM (Static Random Access Memory) according to a preset first-level cache data structure; reading a bus bit wide ciphertext instruction from the first-level cache SRAM, splitting the bus bit wide ciphertext instruction into single instruction data, and writing all the single instruction data into a second-level cache SRAM according to a preset second-level cache data structure; and reading the single instruction data from the second-level cache SRAM, and decoding the single instruction data according to a preset instruction format to obtain analysis data and a target node. The problem of low processing efficiency in the ciphertext calculation instruction processing process is solved, and the processing eff