MOS transistor isolation region manufacturing method and MOS transistor

The invention provides a manufacturing method of an MOS transistor isolation region and an MOS transistor. The MOS transistor isolation region comprises a semiconductor substrate, an epitaxial layer, an oxide layer, a polycrystalline silicon layer, a silicon nitride layer and an etcher. The epitaxial layer, the oxide layer, the polycrystalline silicon layer and the silicon nitride layer are arranged on the semiconductor substrate, so that the overall performance of the transistor can be enhanced; meanwhile, the first substrate layer, the epitaxial semiconductor, the second substrate layer and the intrinsic silicon layer effectively control the impurity type and concentration, and the overall performance is improved; and etching on the polycrystalline silicon layer and the silicon nitride layer to form a pattern, and further generating an oxide to form an isolation region. 本发明提供了一种MOS晶体管隔离区制造方法及MOS晶体管，包括半导体衬底、外延层、氧化物层、多晶硅层、氮化硅层、刻蚀；本发明通过在半导体衬底上设置外延层、氧化物层、多晶硅层、氮化硅层，可以增强晶体管的整体性能；同时第一衬底层、外延半导体、第二衬底层和本征硅层有效的控制了杂质类型