Simplified loop and method for residual current analysis after full compensation of unbalanced power distribution network
The embodiment of the invention discloses a residual current analysis simplified loop and method after full compensation of an unbalanced power distribution network. The loop comprises a ground fault transition resistor Rd, a controllable voltage source internal impedance Z0, a power distribution ne...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The embodiment of the invention discloses a residual current analysis simplified loop and method after full compensation of an unbalanced power distribution network. The loop comprises a ground fault transition resistor Rd, a controllable voltage source internal impedance Z0, a power distribution network ground zero-sequence impedance ZCS, an arc suppression coil impedance ZL and a # imgabs0 power supply generated by unbalanced power distribution network ground parameters. The method comprises the following steps: measuring a power distribution network ground parameter unbalanced power supply voltage through a voltage transformer, measuring a power distribution network ground zero sequence impedance value, measuring an arc suppression coil impedance value, measuring an internal resistance value of a ground fault compensation controllable voltage source, and setting different ground fault transition resistance values. The controllable voltage source parallel arc suppression coil grounding system adopts a calcu |
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