Wafer, manufacturing method thereof, packaging structure and packaging method
The invention discloses a wafer, a manufacturing method thereof, a packaging structure and a packaging method. The wafer comprises a substrate; the dielectric layer is located on the substrate, and the surface, opposite to one side of the substrate, of the dielectric layer is a bonding surface; the...
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| creator | SUI KAI |
| description | The invention discloses a wafer, a manufacturing method thereof, a packaging structure and a packaging method. The wafer comprises a substrate; the dielectric layer is located on the substrate, and the surface, opposite to one side of the substrate, of the dielectric layer is a bonding surface; the bonding pad is located in the dielectric layer of the main chip area, the top surface of the bonding pad is exposed out of the bonding surface, and the bonding pad is used for realizing bonding among the bonding surfaces of a plurality of wafers; and the bonding structure is located in the dielectric layer of the trimming area, the bonding structure is exposed out of the bonding surface, the bonding structure is used for realizing the bonding between the bonding surfaces of a plurality of wafers, and the bonding strength between the bonding structures is greater than the bonding strength between the bonding pads. And the packaging reliability and the product yield of the semiconductor structure are improved.
一种晶圆及其 |
| format | Patent |
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一种晶圆及其</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPANT0xLLdJRyE3MK01LTC4pLcrMS1fITS3JyE9RKMlILUrNT9NRKEhMzk5MB8kUlxSVglSlKiTmpSCJQ3TwMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjUYqDy1LzUknhnP0NDCwNTY3MzS0djYtQAAOmvNmI</recordid><startdate>20240517</startdate><enddate>20240517</enddate><creator>SUI KAI</creator><scope>EVB</scope></search><sort><creationdate>20240517</creationdate><title>Wafer, manufacturing method thereof, packaging structure and packaging method</title><author>SUI KAI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN118053769A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>SUI KAI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SUI KAI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Wafer, manufacturing method thereof, packaging structure and packaging method</title><date>2024-05-17</date><risdate>2024</risdate><abstract>The invention discloses a wafer, a manufacturing method thereof, a packaging structure and a packaging method. The wafer comprises a substrate; the dielectric layer is located on the substrate, and the surface, opposite to one side of the substrate, of the dielectric layer is a bonding surface; the bonding pad is located in the dielectric layer of the main chip area, the top surface of the bonding pad is exposed out of the bonding surface, and the bonding pad is used for realizing bonding among the bonding surfaces of a plurality of wafers; and the bonding structure is located in the dielectric layer of the trimming area, the bonding structure is exposed out of the bonding surface, the bonding structure is used for realizing the bonding between the bonding surfaces of a plurality of wafers, and the bonding strength between the bonding structures is greater than the bonding strength between the bonding pads. And the packaging reliability and the product yield of the semiconductor structure are improved.
一种晶圆及其</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Wafer, manufacturing method thereof, packaging structure and packaging method |
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