Synchronized multiprocessor operating system timer

An integrated circuit device (1) comprises a plurality of processor cores (2, 3) and a system timer (10). A system timer (10) includes a first oscillator (32) outputting a first clock signal at a first frequency, a first count register (34) incremented by the first clock signal, and a plurality of event registers (52). Each event register (52) triggers an event when the value stored therein is determined to be equal to the value stored in the first count register (34). The first counter register (34) is readable by each of the plurality of processor cores (2, 3), and each of the processor cores (2, 3) is capable of writing to at least one of the event registers (52). 集成电路装置(1)包括多个处理器核(2，3)和系统计时器(10)。系统计时器(10)包括：输出处于第一频率的第一时钟信号的第一振荡器(32)、通过第一时钟信号递增的第一计数寄存器(34)以及多个事件寄存器(52)。每个事件寄存器(52)在其中保存的值被确定为等于第一计数寄存器(34)中保存的值时，触发事件。第一计数器寄存器(34)是通过多个处理器核(2，3)中的每一个可读的，并且处理器核(2，3)中的每一个能够对事件寄存器(52)中的至少一个进行写入。