Apparatus and method for secure operation mode when memory channel improper behavior occurs

Various embodiments may include methods and systems for reconfiguring memory channel routing within a system on a chip (SoC). A method may include obtaining first error information in response to an improper behavior in a first memory channel of a network interface unit (NIU) communicatively connect...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: MEHRA SAURABH B, AGRAWAL PUNEET, DESAI KOMAL, MALIPEDDI KRISHNA K
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator MEHRA SAURABH B
AGRAWAL PUNEET
DESAI KOMAL
MALIPEDDI KRISHNA K
description Various embodiments may include methods and systems for reconfiguring memory channel routing within a system on a chip (SoC). A method may include obtaining first error information in response to an improper behavior in a first memory channel of a network interface unit (NIU) communicatively connected to the SoC. The method may also include storing the first error information in a non-volatile memory, the first error information being read when the SoC is booted, and rebooting the SoC including the first memory channel. The method may also include, in response to reading the stored first error information during a reboot, configuring the first memory channel to communicatively disconnect from the NIU and a second memory channel to communicatively connect to the NIU. 各个实施方案可包括用于重新配置片上系统(SoC)内的存储器信道路由的方法和系统。一种方法可包括响应于通信地连接到该SoC的网络接口单元(NIU)的第一存储器信道中的不当行为,获得第一错误信息。该方法还可包括将该第一错误信息存储在非易失性存储器中,该第一错误信息在该SoC启动时读取,以及重新启动包括该第一存储器信道的该SoC。该方法还可包括响应于在重新启动期间读取所存储的第一错误信息,将该第一存储器信道配置为与该NIU通信地断开并将第二存储器信道配置为通信地连接到该NIU。
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN117940905A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN117940905A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN117940905A3</originalsourceid><addsrcrecordid>eNqNi7EKwjAURbM4iPoPrx8gtKhIx1IUJyc3h_JMbkmhyQtJq_j3RvADnO6Be85S3ZsQOPI0J2JvyGGyYqiXSAl6jiAJyPcgnpwY0MsiE5zEN2nL3mOkwYX41egBy88ht6Jzm9Zq0fOYsPntShXn0629bBGkQwqs4TF17bWqjvW-rMtDs_vH-QCaMjvk</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Apparatus and method for secure operation mode when memory channel improper behavior occurs</title><source>esp@cenet</source><creator>MEHRA SAURABH B ; AGRAWAL PUNEET ; DESAI KOMAL ; MALIPEDDI KRISHNA K</creator><creatorcontrib>MEHRA SAURABH B ; AGRAWAL PUNEET ; DESAI KOMAL ; MALIPEDDI KRISHNA K</creatorcontrib><description>Various embodiments may include methods and systems for reconfiguring memory channel routing within a system on a chip (SoC). A method may include obtaining first error information in response to an improper behavior in a first memory channel of a network interface unit (NIU) communicatively connected to the SoC. The method may also include storing the first error information in a non-volatile memory, the first error information being read when the SoC is booted, and rebooting the SoC including the first memory channel. The method may also include, in response to reading the stored first error information during a reboot, configuring the first memory channel to communicatively disconnect from the NIU and a second memory channel to communicatively connect to the NIU. 各个实施方案可包括用于重新配置片上系统(SoC)内的存储器信道路由的方法和系统。一种方法可包括响应于通信地连接到该SoC的网络接口单元(NIU)的第一存储器信道中的不当行为,获得第一错误信息。该方法还可包括将该第一错误信息存储在非易失性存储器中,该第一错误信息在该SoC启动时读取,以及重新启动包括该第一存储器信道的该SoC。该方法还可包括响应于在重新启动期间读取所存储的第一错误信息,将该第一存储器信道配置为与该NIU通信地断开并将第二存储器信道配置为通信地连接到该NIU。</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240426&amp;DB=EPODOC&amp;CC=CN&amp;NR=117940905A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240426&amp;DB=EPODOC&amp;CC=CN&amp;NR=117940905A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MEHRA SAURABH B</creatorcontrib><creatorcontrib>AGRAWAL PUNEET</creatorcontrib><creatorcontrib>DESAI KOMAL</creatorcontrib><creatorcontrib>MALIPEDDI KRISHNA K</creatorcontrib><title>Apparatus and method for secure operation mode when memory channel improper behavior occurs</title><description>Various embodiments may include methods and systems for reconfiguring memory channel routing within a system on a chip (SoC). A method may include obtaining first error information in response to an improper behavior in a first memory channel of a network interface unit (NIU) communicatively connected to the SoC. The method may also include storing the first error information in a non-volatile memory, the first error information being read when the SoC is booted, and rebooting the SoC including the first memory channel. The method may also include, in response to reading the stored first error information during a reboot, configuring the first memory channel to communicatively disconnect from the NIU and a second memory channel to communicatively connect to the NIU. 各个实施方案可包括用于重新配置片上系统(SoC)内的存储器信道路由的方法和系统。一种方法可包括响应于通信地连接到该SoC的网络接口单元(NIU)的第一存储器信道中的不当行为,获得第一错误信息。该方法还可包括将该第一错误信息存储在非易失性存储器中,该第一错误信息在该SoC启动时读取,以及重新启动包括该第一存储器信道的该SoC。该方法还可包括响应于在重新启动期间读取所存储的第一错误信息,将该第一存储器信道配置为与该NIU通信地断开并将第二存储器信道配置为通信地连接到该NIU。</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi7EKwjAURbM4iPoPrx8gtKhIx1IUJyc3h_JMbkmhyQtJq_j3RvADnO6Be85S3ZsQOPI0J2JvyGGyYqiXSAl6jiAJyPcgnpwY0MsiE5zEN2nL3mOkwYX41egBy88ht6Jzm9Zq0fOYsPntShXn0629bBGkQwqs4TF17bWqjvW-rMtDs_vH-QCaMjvk</recordid><startdate>20240426</startdate><enddate>20240426</enddate><creator>MEHRA SAURABH B</creator><creator>AGRAWAL PUNEET</creator><creator>DESAI KOMAL</creator><creator>MALIPEDDI KRISHNA K</creator><scope>EVB</scope></search><sort><creationdate>20240426</creationdate><title>Apparatus and method for secure operation mode when memory channel improper behavior occurs</title><author>MEHRA SAURABH B ; AGRAWAL PUNEET ; DESAI KOMAL ; MALIPEDDI KRISHNA K</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN117940905A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>MEHRA SAURABH B</creatorcontrib><creatorcontrib>AGRAWAL PUNEET</creatorcontrib><creatorcontrib>DESAI KOMAL</creatorcontrib><creatorcontrib>MALIPEDDI KRISHNA K</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MEHRA SAURABH B</au><au>AGRAWAL PUNEET</au><au>DESAI KOMAL</au><au>MALIPEDDI KRISHNA K</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Apparatus and method for secure operation mode when memory channel improper behavior occurs</title><date>2024-04-26</date><risdate>2024</risdate><abstract>Various embodiments may include methods and systems for reconfiguring memory channel routing within a system on a chip (SoC). A method may include obtaining first error information in response to an improper behavior in a first memory channel of a network interface unit (NIU) communicatively connected to the SoC. The method may also include storing the first error information in a non-volatile memory, the first error information being read when the SoC is booted, and rebooting the SoC including the first memory channel. The method may also include, in response to reading the stored first error information during a reboot, configuring the first memory channel to communicatively disconnect from the NIU and a second memory channel to communicatively connect to the NIU. 各个实施方案可包括用于重新配置片上系统(SoC)内的存储器信道路由的方法和系统。一种方法可包括响应于通信地连接到该SoC的网络接口单元(NIU)的第一存储器信道中的不当行为,获得第一错误信息。该方法还可包括将该第一错误信息存储在非易失性存储器中,该第一错误信息在该SoC启动时读取,以及重新启动包括该第一存储器信道的该SoC。该方法还可包括响应于在重新启动期间读取所存储的第一错误信息,将该第一存储器信道配置为与该NIU通信地断开并将第二存储器信道配置为通信地连接到该NIU。</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN117940905A
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Apparatus and method for secure operation mode when memory channel improper behavior occurs
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-30T20%3A57%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MEHRA%20SAURABH%20B&rft.date=2024-04-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN117940905A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true