Semiconductor device structure and preparation method thereof

The invention relates to a semiconductor device structure and a preparation method thereof. The preparation method of the semiconductor device structure comprises the following steps: providing a substrate; forming an epitaxial layer on the surface of the substrate; forming a buried oxide layer in t...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: HUANG XIUHONG, YANG JUN, YANG WENMIN, MO LIYI, LUO XINGJUN
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator HUANG XIUHONG
YANG JUN
YANG WENMIN
MO LIYI
LUO XINGJUN
description The invention relates to a semiconductor device structure and a preparation method thereof. The preparation method of the semiconductor device structure comprises the following steps: providing a substrate; forming an epitaxial layer on the surface of the substrate; forming a buried oxide layer in the epitaxial layer; forming a groove in the epitaxial layer, wherein the buried oxide layer is exposed out of the groove; and forming a gate oxide layer on the side wall of the groove, wherein the gate oxide layer is in contact with the buried oxide layer. The buried oxide layer is formed in the epitaxial layer, then the gate oxide layer is formed on the side wall of the groove, and due to the existence of the buried oxide layer, the problem that the gate oxide layer bears a huge electric field and is broken down during the conduction period of the semiconductor device structure due to the fact that the electric field is gathered at the corner of the bottom of the groove of the semiconductor device structure is sol
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN117766401A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN117766401A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN117766401A3</originalsourceid><addsrcrecordid>eNrjZLANTs3NTM7PSylNLskvUkhJLctMTlUoLikC8kuLUhUS81IUCopSCxKLEksy8_MUclNLMvJTFEoyUotS89N4GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakm8s5-hobm5mZmJgaGjMTFqAH0JMOw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device structure and preparation method thereof</title><source>esp@cenet</source><creator>HUANG XIUHONG ; YANG JUN ; YANG WENMIN ; MO LIYI ; LUO XINGJUN</creator><creatorcontrib>HUANG XIUHONG ; YANG JUN ; YANG WENMIN ; MO LIYI ; LUO XINGJUN</creatorcontrib><description>The invention relates to a semiconductor device structure and a preparation method thereof. The preparation method of the semiconductor device structure comprises the following steps: providing a substrate; forming an epitaxial layer on the surface of the substrate; forming a buried oxide layer in the epitaxial layer; forming a groove in the epitaxial layer, wherein the buried oxide layer is exposed out of the groove; and forming a gate oxide layer on the side wall of the groove, wherein the gate oxide layer is in contact with the buried oxide layer. The buried oxide layer is formed in the epitaxial layer, then the gate oxide layer is formed on the side wall of the groove, and due to the existence of the buried oxide layer, the problem that the gate oxide layer bears a huge electric field and is broken down during the conduction period of the semiconductor device structure due to the fact that the electric field is gathered at the corner of the bottom of the groove of the semiconductor device structure is sol</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240326&amp;DB=EPODOC&amp;CC=CN&amp;NR=117766401A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,782,887,25571,76555</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240326&amp;DB=EPODOC&amp;CC=CN&amp;NR=117766401A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HUANG XIUHONG</creatorcontrib><creatorcontrib>YANG JUN</creatorcontrib><creatorcontrib>YANG WENMIN</creatorcontrib><creatorcontrib>MO LIYI</creatorcontrib><creatorcontrib>LUO XINGJUN</creatorcontrib><title>Semiconductor device structure and preparation method thereof</title><description>The invention relates to a semiconductor device structure and a preparation method thereof. The preparation method of the semiconductor device structure comprises the following steps: providing a substrate; forming an epitaxial layer on the surface of the substrate; forming a buried oxide layer in the epitaxial layer; forming a groove in the epitaxial layer, wherein the buried oxide layer is exposed out of the groove; and forming a gate oxide layer on the side wall of the groove, wherein the gate oxide layer is in contact with the buried oxide layer. The buried oxide layer is formed in the epitaxial layer, then the gate oxide layer is formed on the side wall of the groove, and due to the existence of the buried oxide layer, the problem that the gate oxide layer bears a huge electric field and is broken down during the conduction period of the semiconductor device structure due to the fact that the electric field is gathered at the corner of the bottom of the groove of the semiconductor device structure is sol</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLANTs3NTM7PSylNLskvUkhJLctMTlUoLikC8kuLUhUS81IUCopSCxKLEksy8_MUclNLMvJTFEoyUotS89N4GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakm8s5-hobm5mZmJgaGjMTFqAH0JMOw</recordid><startdate>20240326</startdate><enddate>20240326</enddate><creator>HUANG XIUHONG</creator><creator>YANG JUN</creator><creator>YANG WENMIN</creator><creator>MO LIYI</creator><creator>LUO XINGJUN</creator><scope>EVB</scope></search><sort><creationdate>20240326</creationdate><title>Semiconductor device structure and preparation method thereof</title><author>HUANG XIUHONG ; YANG JUN ; YANG WENMIN ; MO LIYI ; LUO XINGJUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN117766401A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>HUANG XIUHONG</creatorcontrib><creatorcontrib>YANG JUN</creatorcontrib><creatorcontrib>YANG WENMIN</creatorcontrib><creatorcontrib>MO LIYI</creatorcontrib><creatorcontrib>LUO XINGJUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HUANG XIUHONG</au><au>YANG JUN</au><au>YANG WENMIN</au><au>MO LIYI</au><au>LUO XINGJUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device structure and preparation method thereof</title><date>2024-03-26</date><risdate>2024</risdate><abstract>The invention relates to a semiconductor device structure and a preparation method thereof. The preparation method of the semiconductor device structure comprises the following steps: providing a substrate; forming an epitaxial layer on the surface of the substrate; forming a buried oxide layer in the epitaxial layer; forming a groove in the epitaxial layer, wherein the buried oxide layer is exposed out of the groove; and forming a gate oxide layer on the side wall of the groove, wherein the gate oxide layer is in contact with the buried oxide layer. The buried oxide layer is formed in the epitaxial layer, then the gate oxide layer is formed on the side wall of the groove, and due to the existence of the buried oxide layer, the problem that the gate oxide layer bears a huge electric field and is broken down during the conduction period of the semiconductor device structure due to the fact that the electric field is gathered at the corner of the bottom of the groove of the semiconductor device structure is sol</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN117766401A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor device structure and preparation method thereof
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-04T12%3A53%3A02IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HUANG%20XIUHONG&rft.date=2024-03-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN117766401A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true