Access request reordering for multi-channel interface across memory-based communication queue
The invention relates to access request reordering for a multi-channel interface across a memory-based communication queue. A system includes a host device having a first buffer with ordered data. The accelerator device has a data movement processor and a reordering buffer. A multi-channel interface...
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| creator | DUGAN MICHAEL K BREWER TONY M |
| description | The invention relates to access request reordering for a multi-channel interface across a memory-based communication queue. A system includes a host device having a first buffer with ordered data. The accelerator device has a data movement processor and a reordering buffer. A multi-channel interface couples the host device and the data movement processor of the accelerator device. The data movement processor is configured to issue read commands for a portion of the ordered data. An entry of the reorder buffer is allocated in coordination with issuing the read command. A transaction identifier for the read command is assigned. An out-of-order response is received from the host device via the multi-channel interface. The response includes a respective portion of the ordered data and a respective transaction identifier. The response is reordered in the reorder buffer based on the respective transaction identifier and the allocated entry of the reorder buffer.
本公开涉及跨越基于存储器的通信队列的多信道接口的存取请求重新排序。系统包含主机装置，所述主机装置具有带有有 |
| format | Patent |
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本公开涉及跨越基于存储器的通信队列的多信道接口的存取请求重新排序。系统包含主机装置，所述主机装置具有带有有</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240301&DB=EPODOC&CC=CN&NR=117631974A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240301&DB=EPODOC&CC=CN&NR=117631974A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>DUGAN MICHAEL K</creatorcontrib><creatorcontrib>BREWER TONY M</creatorcontrib><title>Access request reordering for multi-channel interface across memory-based communication queue</title><description>The invention relates to access request reordering for a multi-channel interface across a memory-based communication queue. A system includes a host device having a first buffer with ordered data. The accelerator device has a data movement processor and a reordering buffer. A multi-channel interface couples the host device and the data movement processor of the accelerator device. The data movement processor is configured to issue read commands for a portion of the ordered data. An entry of the reorder buffer is allocated in coordination with issuing the read command. A transaction identifier for the read command is assigned. An out-of-order response is received from the host device via the multi-channel interface. The response includes a respective portion of the ordered data and a respective transaction identifier. The response is reordered in the reorder buffer based on the respective transaction identifier and the allocated entry of the reorder buffer.
本公开涉及跨越基于存储器的通信队列的多信道接口的存取请求重新排序。系统包含主机装置，所述主机装置具有带有有</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjDEOwjAQBNNQIOAPxwNSREFElFEEoqKiRZG5bIil-BzOdsHvccEDqKaZmXXxaJkRAineCSFmeh2gVl40eiWX5mhLnowIZrISoaNhkGH1uXJwXj_l0wQMxN65JJZNtF4o7xK2xWo0c8Dux02xv5zv3bXE4nuEJa8Ese9uVdUc6-rUHNr6H-cLXcM9Eg</recordid><startdate>20240301</startdate><enddate>20240301</enddate><creator>DUGAN MICHAEL K</creator><creator>BREWER TONY M</creator><scope>EVB</scope></search><sort><creationdate>20240301</creationdate><title>Access request reordering for multi-channel interface across memory-based communication queue</title><author>DUGAN MICHAEL K ; BREWER TONY M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN117631974A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>DUGAN MICHAEL K</creatorcontrib><creatorcontrib>BREWER TONY M</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>DUGAN MICHAEL K</au><au>BREWER TONY M</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Access request reordering for multi-channel interface across memory-based communication queue</title><date>2024-03-01</date><risdate>2024</risdate><abstract>The invention relates to access request reordering for a multi-channel interface across a memory-based communication queue. A system includes a host device having a first buffer with ordered data. The accelerator device has a data movement processor and a reordering buffer. A multi-channel interface couples the host device and the data movement processor of the accelerator device. The data movement processor is configured to issue read commands for a portion of the ordered data. An entry of the reorder buffer is allocated in coordination with issuing the read command. A transaction identifier for the read command is assigned. An out-of-order response is received from the host device via the multi-channel interface. The response includes a respective portion of the ordered data and a respective transaction identifier. The response is reordered in the reorder buffer based on the respective transaction identifier and the allocated entry of the reorder buffer.
本公开涉及跨越基于存储器的通信队列的多信道接口的存取请求重新排序。系统包含主机装置，所述主机装置具有带有有</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Access request reordering for multi-channel interface across memory-based communication queue |
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