Array substrate, liquid crystal display panel and display device
An array substrate, a liquid crystal display panel and a display device wherein the array substrate comprises a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a flat layer (50), a first electrode layer (90A), a fourth insulating layer (7...
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| creator | LIU SHANGPENG XIN HAOYI LI JING FAN RUI LIU ZHAO QIAO CHENRONG SU HAIDONG ZHANG MIN LI WEI YAN XIAO LI YANFENG XU JINGJING FAN JIANXIONG |
| description | An array substrate, a liquid crystal display panel and a display device wherein the array substrate comprises a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a flat layer (50), a first electrode layer (90A), a fourth insulating layer (70) and a second electrode layer (90B); the third insulating layer (40) comprises a first interlayer insulating layer (40A), a second interlayer insulating layer (40B) and a third interlayer insulating layer (40C) which are stacked in sequence; the first interlayer insulating layer (40A) is located on the side, close to the substrate (10), of the second interlayer insulating layer (40B), and the third interlayer insulating layer (40C) is located on the side, away from the substrate (10), of the second interlayer insulating layer (40B); the first interlayer insulating layer (40A) and the third interlayer insulating layer (40C) are made of silicon oxide; the material of the second interlayer insulating layer (40B) inc |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN117063285A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN117063285A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN117063285A3</originalsourceid><addsrcrecordid>eNrjZHBwLCpKrFQoLk0qLilKLEnVUcjJLCzNTFFILqosLknMUUjJLC7IAaooSMxLzVFIzEuBi6SklmUmp_IwsKYl5hSn8kJpbgZFN9cQZw_d1IL8-NTigsTk1LzUknhnP0NDcwMzYyMLU0djYtQAANT9MVo</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Array substrate, liquid crystal display panel and display device</title><source>esp@cenet</source><creator>LIU SHANGPENG ; XIN HAOYI ; LI JING ; FAN RUI ; LIU ZHAO ; QIAO CHENRONG ; SU HAIDONG ; ZHANG MIN ; LI WEI ; YAN XIAO ; LI YANFENG ; XU JINGJING ; FAN JIANXIONG</creator><creatorcontrib>LIU SHANGPENG ; XIN HAOYI ; LI JING ; FAN RUI ; LIU ZHAO ; QIAO CHENRONG ; SU HAIDONG ; ZHANG MIN ; LI WEI ; YAN XIAO ; LI YANFENG ; XU JINGJING ; FAN JIANXIONG</creatorcontrib><description>An array substrate, a liquid crystal display panel and a display device wherein the array substrate comprises a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a flat layer (50), a first electrode layer (90A), a fourth insulating layer (70) and a second electrode layer (90B); the third insulating layer (40) comprises a first interlayer insulating layer (40A), a second interlayer insulating layer (40B) and a third interlayer insulating layer (40C) which are stacked in sequence; the first interlayer insulating layer (40A) is located on the side, close to the substrate (10), of the second interlayer insulating layer (40B), and the third interlayer insulating layer (40C) is located on the side, away from the substrate (10), of the second interlayer insulating layer (40B); the first interlayer insulating layer (40A) and the third interlayer insulating layer (40C) are made of silicon oxide; the material of the second interlayer insulating layer (40B) inc</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231114&DB=EPODOC&CC=CN&NR=117063285A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231114&DB=EPODOC&CC=CN&NR=117063285A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LIU SHANGPENG</creatorcontrib><creatorcontrib>XIN HAOYI</creatorcontrib><creatorcontrib>LI JING</creatorcontrib><creatorcontrib>FAN RUI</creatorcontrib><creatorcontrib>LIU ZHAO</creatorcontrib><creatorcontrib>QIAO CHENRONG</creatorcontrib><creatorcontrib>SU HAIDONG</creatorcontrib><creatorcontrib>ZHANG MIN</creatorcontrib><creatorcontrib>LI WEI</creatorcontrib><creatorcontrib>YAN XIAO</creatorcontrib><creatorcontrib>LI YANFENG</creatorcontrib><creatorcontrib>XU JINGJING</creatorcontrib><creatorcontrib>FAN JIANXIONG</creatorcontrib><title>Array substrate, liquid crystal display panel and display device</title><description>An array substrate, a liquid crystal display panel and a display device wherein the array substrate comprises a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a flat layer (50), a first electrode layer (90A), a fourth insulating layer (70) and a second electrode layer (90B); the third insulating layer (40) comprises a first interlayer insulating layer (40A), a second interlayer insulating layer (40B) and a third interlayer insulating layer (40C) which are stacked in sequence; the first interlayer insulating layer (40A) is located on the side, close to the substrate (10), of the second interlayer insulating layer (40B), and the third interlayer insulating layer (40C) is located on the side, away from the substrate (10), of the second interlayer insulating layer (40B); the first interlayer insulating layer (40A) and the third interlayer insulating layer (40C) are made of silicon oxide; the material of the second interlayer insulating layer (40B) inc</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHBwLCpKrFQoLk0qLilKLEnVUcjJLCzNTFFILqosLknMUUjJLC7IAaooSMxLzVFIzEuBi6SklmUmp_IwsKYl5hSn8kJpbgZFN9cQZw_d1IL8-NTigsTk1LzUknhnP0NDcwMzYyMLU0djYtQAANT9MVo</recordid><startdate>20231114</startdate><enddate>20231114</enddate><creator>LIU SHANGPENG</creator><creator>XIN HAOYI</creator><creator>LI JING</creator><creator>FAN RUI</creator><creator>LIU ZHAO</creator><creator>QIAO CHENRONG</creator><creator>SU HAIDONG</creator><creator>ZHANG MIN</creator><creator>LI WEI</creator><creator>YAN XIAO</creator><creator>LI YANFENG</creator><creator>XU JINGJING</creator><creator>FAN JIANXIONG</creator><scope>EVB</scope></search><sort><creationdate>20231114</creationdate><title>Array substrate, liquid crystal display panel and display device</title><author>LIU SHANGPENG ; XIN HAOYI ; LI JING ; FAN RUI ; LIU ZHAO ; QIAO CHENRONG ; SU HAIDONG ; ZHANG MIN ; LI WEI ; YAN XIAO ; LI YANFENG ; XU JINGJING ; FAN JIANXIONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN117063285A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LIU SHANGPENG</creatorcontrib><creatorcontrib>XIN HAOYI</creatorcontrib><creatorcontrib>LI JING</creatorcontrib><creatorcontrib>FAN RUI</creatorcontrib><creatorcontrib>LIU ZHAO</creatorcontrib><creatorcontrib>QIAO CHENRONG</creatorcontrib><creatorcontrib>SU HAIDONG</creatorcontrib><creatorcontrib>ZHANG MIN</creatorcontrib><creatorcontrib>LI WEI</creatorcontrib><creatorcontrib>YAN XIAO</creatorcontrib><creatorcontrib>LI YANFENG</creatorcontrib><creatorcontrib>XU JINGJING</creatorcontrib><creatorcontrib>FAN JIANXIONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIU SHANGPENG</au><au>XIN HAOYI</au><au>LI JING</au><au>FAN RUI</au><au>LIU ZHAO</au><au>QIAO CHENRONG</au><au>SU HAIDONG</au><au>ZHANG MIN</au><au>LI WEI</au><au>YAN XIAO</au><au>LI YANFENG</au><au>XU JINGJING</au><au>FAN JIANXIONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Array substrate, liquid crystal display panel and display device</title><date>2023-11-14</date><risdate>2023</risdate><abstract>An array substrate, a liquid crystal display panel and a display device wherein the array substrate comprises a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a flat layer (50), a first electrode layer (90A), a fourth insulating layer (70) and a second electrode layer (90B); the third insulating layer (40) comprises a first interlayer insulating layer (40A), a second interlayer insulating layer (40B) and a third interlayer insulating layer (40C) which are stacked in sequence; the first interlayer insulating layer (40A) is located on the side, close to the substrate (10), of the second interlayer insulating layer (40B), and the third interlayer insulating layer (40C) is located on the side, away from the substrate (10), of the second interlayer insulating layer (40B); the first interlayer insulating layer (40A) and the third interlayer insulating layer (40C) are made of silicon oxide; the material of the second interlayer insulating layer (40B) inc</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Array substrate, liquid crystal display panel and display device |
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