Die substrate for optimizing signal routing
A die substrate for optimizing signal routing is disclosed. A die substrate includes a dielectric body having a first body surface, a second body surface on an opposite side, and a body edge surface therebetween. And a current-carrying metal line located in the dielectric body. One or more of the me...
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| creator | YAN SHUANGHU CAI XIAOZHUO ZHU HAO LI HUAMING YI DINGHAI |
| description | A die substrate for optimizing signal routing is disclosed. A die substrate includes a dielectric body having a first body surface, a second body surface on an opposite side, and a body edge surface therebetween. And a current-carrying metal line located in the dielectric body. One or more of the metal lines are routed to one or more of the body edge surfaces. And a termination layer on at least one body edge surface and electrically connected to at least one of the metal lines routed to the body edge surface. And the conductive plating layer is positioned on at least one body edge surface. The plating layer is connected to the termination layer for galvanic connection or ground connection to at least one metal line. A method of manufacturing an integrated circuit package, an integrated circuit package, and a computer having a die substrate are also disclosed.
公开了用于优化信号路由的管芯基板。一种管芯基板，包括：电介质本体，所述本体具有第一本体表面、位于相对侧上的第二本体表面以及位于其间的本体边缘表面。载流金属线，其位于电介质本体中。金属线中的一个或更多个被路由到本体边缘表面的一个或更多个。终止层，其位于至少一个本体边缘表面上并电连接至被路由到所述本体边缘 |
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公开了用于优化信号路由的管芯基板。一种管芯基板，包括：电介质本体，所述本体具有第一本体表面、位于相对侧上的第二本体表面以及位于其间的本体边缘表面。载流金属线，其位于电介质本体中。金属线中的一个或更多个被路由到本体边缘表面的一个或更多个。终止层，其位于至少一个本体边缘表面上并电连接至被路由到所述本体边缘</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231024&DB=EPODOC&CC=CN&NR=116936517A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231024&DB=EPODOC&CC=CN&NR=116936517A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YAN SHUANGHU</creatorcontrib><creatorcontrib>CAI XIAOZHUO</creatorcontrib><creatorcontrib>ZHU HAO</creatorcontrib><creatorcontrib>LI HUAMING</creatorcontrib><creatorcontrib>YI DINGHAI</creatorcontrib><title>Die substrate for optimizing signal routing</title><description>A die substrate for optimizing signal routing is disclosed. A die substrate includes a dielectric body having a first body surface, a second body surface on an opposite side, and a body edge surface therebetween. And a current-carrying metal line located in the dielectric body. One or more of the metal lines are routed to one or more of the body edge surfaces. And a termination layer on at least one body edge surface and electrically connected to at least one of the metal lines routed to the body edge surface. And the conductive plating layer is positioned on at least one body edge surface. The plating layer is connected to the termination layer for galvanic connection or ground connection to at least one metal line. A method of manufacturing an integrated circuit package, an integrated circuit package, and a computer having a die substrate are also disclosed.
公开了用于优化信号路由的管芯基板。一种管芯基板，包括：电介质本体，所述本体具有第一本体表面、位于相对侧上的第二本体表面以及位于其间的本体边缘表面。载流金属线，其位于电介质本体中。金属线中的一个或更多个被路由到本体边缘表面的一个或更多个。终止层，其位于至少一个本体边缘表面上并电连接至被路由到所述本体边缘</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNB2yUxVKC5NKi4pSixJVUjLL1LILyjJzM2sysxLVyjOTM9LzFEoyi8tAXJ5GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakm8s5-hoZmlsZmpobmjMTFqAIFZKcY</recordid><startdate>20231024</startdate><enddate>20231024</enddate><creator>YAN SHUANGHU</creator><creator>CAI XIAOZHUO</creator><creator>ZHU HAO</creator><creator>LI HUAMING</creator><creator>YI DINGHAI</creator><scope>EVB</scope></search><sort><creationdate>20231024</creationdate><title>Die substrate for optimizing signal routing</title><author>YAN SHUANGHU ; CAI XIAOZHUO ; ZHU HAO ; LI HUAMING ; YI DINGHAI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN116936517A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>YAN SHUANGHU</creatorcontrib><creatorcontrib>CAI XIAOZHUO</creatorcontrib><creatorcontrib>ZHU HAO</creatorcontrib><creatorcontrib>LI HUAMING</creatorcontrib><creatorcontrib>YI DINGHAI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YAN SHUANGHU</au><au>CAI XIAOZHUO</au><au>ZHU HAO</au><au>LI HUAMING</au><au>YI DINGHAI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Die substrate for optimizing signal routing</title><date>2023-10-24</date><risdate>2023</risdate><abstract>A die substrate for optimizing signal routing is disclosed. A die substrate includes a dielectric body having a first body surface, a second body surface on an opposite side, and a body edge surface therebetween. And a current-carrying metal line located in the dielectric body. One or more of the metal lines are routed to one or more of the body edge surfaces. And a termination layer on at least one body edge surface and electrically connected to at least one of the metal lines routed to the body edge surface. And the conductive plating layer is positioned on at least one body edge surface. The plating layer is connected to the termination layer for galvanic connection or ground connection to at least one metal line. A method of manufacturing an integrated circuit package, an integrated circuit package, and a computer having a die substrate are also disclosed.
公开了用于优化信号路由的管芯基板。一种管芯基板，包括：电介质本体，所述本体具有第一本体表面、位于相对侧上的第二本体表面以及位于其间的本体边缘表面。载流金属线，其位于电介质本体中。金属线中的一个或更多个被路由到本体边缘表面的一个或更多个。终止层，其位于至少一个本体边缘表面上并电连接至被路由到所述本体边缘</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Die substrate for optimizing signal routing |
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