Method for reducing silicon oxide loss of shallow trench isolation region in epitaxial layer trench etching

The invention provides a method for reducing silicon oxide deficiency in a shallow trench isolation region in epitaxial layer trench etching, which comprises the following steps of: providing a substrate, forming STI (shallow trench isolation) on the substrate to define an active region, and forming...

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Hauptverfasser: JIANG LINPENG, AN SUYANG
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creator JIANG LINPENG
AN SUYANG
description The invention provides a method for reducing silicon oxide deficiency in a shallow trench isolation region in epitaxial layer trench etching, which comprises the following steps of: providing a substrate, forming STI (shallow trench isolation) on the substrate to define an active region, and forming a plurality of gate laminated structures and source and drain regions corresponding to the gate laminated structures on the active region; forming a first etching barrier layer covering the STI and the gate laminated structure on the substrate, and then etching the etching barrier layer to enable part of the etching barrier layer to be reserved above the STI; forming grooves on the source region and the drain region by utilizing photoetching and etching; and forming an epitaxial layer at the bottom of the groove, and then forming an interlayer dielectric layer covering the gate stack. According to the method, the first etching barrier layer is deposited before exposure, then part of the first etching barrier layer
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Method for reducing silicon oxide loss of shallow trench isolation region in epitaxial layer trench etching
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