Array substrate, display panel and display device

The invention provides an array substrate, a display panel and a display device.The array substrate comprises a substrate, the substrate comprises a display area and a non-display area surrounding the display area, and a gate electrode layer, a source and drain electrode layer, a first passivation l...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: QIAN HAIJIAO, ZHANG LIN
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator QIAN HAIJIAO
ZHANG LIN
description The invention provides an array substrate, a display panel and a display device.The array substrate comprises a substrate, the substrate comprises a display area and a non-display area surrounding the display area, and a gate electrode layer, a source and drain electrode layer, a first passivation layer and a second passivation layer are sequentially stacked on the substrate; the gate electrode layer is arranged close to the substrate, a first slotted hole located in the non-display area is formed in the second passivation layer, the first slotted hole at most penetrates through the source and drain electrode layer to form a first via hole, a second slotted hole located in the non-display area and corresponding to the first via hole is formed in the gate electrode layer, and the second slotted hole is located in the non-display area and corresponds to the first via hole. Therefore, the bottom of the first via hole is recessed. According to the array substrate, the display panel and the display device, the str
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN116779619A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN116779619A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN116779619A3</originalsourceid><addsrcrecordid>eNrjZDB0LCpKrFQoLk0qLilKLEnVUUjJLC7IAQoVJOal5igk5qXARVJSyzKTU3kYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSbyzn6Ghmbm5pZmhpaMxMWoAhiQrnQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Array substrate, display panel and display device</title><source>esp@cenet</source><creator>QIAN HAIJIAO ; ZHANG LIN</creator><creatorcontrib>QIAN HAIJIAO ; ZHANG LIN</creatorcontrib><description>The invention provides an array substrate, a display panel and a display device.The array substrate comprises a substrate, the substrate comprises a display area and a non-display area surrounding the display area, and a gate electrode layer, a source and drain electrode layer, a first passivation layer and a second passivation layer are sequentially stacked on the substrate; the gate electrode layer is arranged close to the substrate, a first slotted hole located in the non-display area is formed in the second passivation layer, the first slotted hole at most penetrates through the source and drain electrode layer to form a first via hole, a second slotted hole located in the non-display area and corresponding to the first via hole is formed in the gate electrode layer, and the second slotted hole is located in the non-display area and corresponds to the first via hole. Therefore, the bottom of the first via hole is recessed. According to the array substrate, the display panel and the display device, the str</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230919&amp;DB=EPODOC&amp;CC=CN&amp;NR=116779619A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230919&amp;DB=EPODOC&amp;CC=CN&amp;NR=116779619A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>QIAN HAIJIAO</creatorcontrib><creatorcontrib>ZHANG LIN</creatorcontrib><title>Array substrate, display panel and display device</title><description>The invention provides an array substrate, a display panel and a display device.The array substrate comprises a substrate, the substrate comprises a display area and a non-display area surrounding the display area, and a gate electrode layer, a source and drain electrode layer, a first passivation layer and a second passivation layer are sequentially stacked on the substrate; the gate electrode layer is arranged close to the substrate, a first slotted hole located in the non-display area is formed in the second passivation layer, the first slotted hole at most penetrates through the source and drain electrode layer to form a first via hole, a second slotted hole located in the non-display area and corresponding to the first via hole is formed in the gate electrode layer, and the second slotted hole is located in the non-display area and corresponds to the first via hole. Therefore, the bottom of the first via hole is recessed. According to the array substrate, the display panel and the display device, the str</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDB0LCpKrFQoLk0qLilKLEnVUUjJLC7IAQoVJOal5igk5qXARVJSyzKTU3kYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSbyzn6Ghmbm5pZmhpaMxMWoAhiQrnQ</recordid><startdate>20230919</startdate><enddate>20230919</enddate><creator>QIAN HAIJIAO</creator><creator>ZHANG LIN</creator><scope>EVB</scope></search><sort><creationdate>20230919</creationdate><title>Array substrate, display panel and display device</title><author>QIAN HAIJIAO ; ZHANG LIN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN116779619A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>QIAN HAIJIAO</creatorcontrib><creatorcontrib>ZHANG LIN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>QIAN HAIJIAO</au><au>ZHANG LIN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Array substrate, display panel and display device</title><date>2023-09-19</date><risdate>2023</risdate><abstract>The invention provides an array substrate, a display panel and a display device.The array substrate comprises a substrate, the substrate comprises a display area and a non-display area surrounding the display area, and a gate electrode layer, a source and drain electrode layer, a first passivation layer and a second passivation layer are sequentially stacked on the substrate; the gate electrode layer is arranged close to the substrate, a first slotted hole located in the non-display area is formed in the second passivation layer, the first slotted hole at most penetrates through the source and drain electrode layer to form a first via hole, a second slotted hole located in the non-display area and corresponding to the first via hole is formed in the gate electrode layer, and the second slotted hole is located in the non-display area and corresponds to the first via hole. Therefore, the bottom of the first via hole is recessed. According to the array substrate, the display panel and the display device, the str</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN116779619A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Array substrate, display panel and display device
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-30T22%3A09%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=QIAN%20HAIJIAO&rft.date=2023-09-19&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN116779619A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true