Domestic encryption platform and server

The invention discloses a domestic encryption platform which comprises the following components: an injection unit which comprises a data input interface, a data output interface, a national micro FPGA, a Junhengjing processor and a noise source chip which is used for generating an encryption key, t...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: ZHOU BAOSEN, CHANG SHUANGJU, MENG XING
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator ZHOU BAOSEN
CHANG SHUANGJU
MENG XING
description The invention discloses a domestic encryption platform which comprises the following components: an injection unit which comprises a data input interface, a data output interface, a national micro FPGA, a Junhengjing processor and a noise source chip which is used for generating an encryption key, the data input interface and the data output interface are connected with the national micro FPGA, the national micro FPGA is connected with the Junhengjing processor, and the noise source chip is connected with the Junhengjing processor; the noise source chip is connected with the Junzhong processor; and the encryption unit is respectively connected with the Junzhong processor and the national micro FPGA. The invention further discloses a server. According to the invention, a data encryption scheme is provided based on a domestic CPU platform, and data encryption and transmission are carried out on the domestic platform, so that a domestic autonomous and controllable data security encryption mode is realized. 本发明公开
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN116541894A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN116541894A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN116541894A3</originalsourceid><addsrcrecordid>eNrjZFB3yc9NLS7JTFZIzUsuqiwoyczPUyjISSxJyy_KVUjMS1EoTi0qSy3iYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GhmamJoYWliaOxsSoAQDGfihO</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Domestic encryption platform and server</title><source>esp@cenet</source><creator>ZHOU BAOSEN ; CHANG SHUANGJU ; MENG XING</creator><creatorcontrib>ZHOU BAOSEN ; CHANG SHUANGJU ; MENG XING</creatorcontrib><description>The invention discloses a domestic encryption platform which comprises the following components: an injection unit which comprises a data input interface, a data output interface, a national micro FPGA, a Junhengjing processor and a noise source chip which is used for generating an encryption key, the data input interface and the data output interface are connected with the national micro FPGA, the national micro FPGA is connected with the Junhengjing processor, and the noise source chip is connected with the Junhengjing processor; the noise source chip is connected with the Junzhong processor; and the encryption unit is respectively connected with the Junzhong processor and the national micro FPGA. The invention further discloses a server. According to the invention, a data encryption scheme is provided based on a domestic CPU platform, and data encryption and transmission are carried out on the domestic platform, so that a domestic autonomous and controllable data security encryption mode is realized. 本发明公开</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230804&amp;DB=EPODOC&amp;CC=CN&amp;NR=116541894A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230804&amp;DB=EPODOC&amp;CC=CN&amp;NR=116541894A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ZHOU BAOSEN</creatorcontrib><creatorcontrib>CHANG SHUANGJU</creatorcontrib><creatorcontrib>MENG XING</creatorcontrib><title>Domestic encryption platform and server</title><description>The invention discloses a domestic encryption platform which comprises the following components: an injection unit which comprises a data input interface, a data output interface, a national micro FPGA, a Junhengjing processor and a noise source chip which is used for generating an encryption key, the data input interface and the data output interface are connected with the national micro FPGA, the national micro FPGA is connected with the Junhengjing processor, and the noise source chip is connected with the Junhengjing processor; the noise source chip is connected with the Junzhong processor; and the encryption unit is respectively connected with the Junzhong processor and the national micro FPGA. The invention further discloses a server. According to the invention, a data encryption scheme is provided based on a domestic CPU platform, and data encryption and transmission are carried out on the domestic platform, so that a domestic autonomous and controllable data security encryption mode is realized. 本发明公开</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFB3yc9NLS7JTFZIzUsuqiwoyczPUyjISSxJyy_KVUjMS1EoTi0qSy3iYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GhmamJoYWliaOxsSoAQDGfihO</recordid><startdate>20230804</startdate><enddate>20230804</enddate><creator>ZHOU BAOSEN</creator><creator>CHANG SHUANGJU</creator><creator>MENG XING</creator><scope>EVB</scope></search><sort><creationdate>20230804</creationdate><title>Domestic encryption platform and server</title><author>ZHOU BAOSEN ; CHANG SHUANGJU ; MENG XING</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN116541894A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>ZHOU BAOSEN</creatorcontrib><creatorcontrib>CHANG SHUANGJU</creatorcontrib><creatorcontrib>MENG XING</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ZHOU BAOSEN</au><au>CHANG SHUANGJU</au><au>MENG XING</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Domestic encryption platform and server</title><date>2023-08-04</date><risdate>2023</risdate><abstract>The invention discloses a domestic encryption platform which comprises the following components: an injection unit which comprises a data input interface, a data output interface, a national micro FPGA, a Junhengjing processor and a noise source chip which is used for generating an encryption key, the data input interface and the data output interface are connected with the national micro FPGA, the national micro FPGA is connected with the Junhengjing processor, and the noise source chip is connected with the Junhengjing processor; the noise source chip is connected with the Junzhong processor; and the encryption unit is respectively connected with the Junzhong processor and the national micro FPGA. The invention further discloses a server. According to the invention, a data encryption scheme is provided based on a domestic CPU platform, and data encryption and transmission are carried out on the domestic platform, so that a domestic autonomous and controllable data security encryption mode is realized. 本发明公开</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN116541894A
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Domestic encryption platform and server
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T02%3A54%3A42IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=ZHOU%20BAOSEN&rft.date=2023-08-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN116541894A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true