Chip test fixture

The invention belongs to the technical field of semiconductors, and discloses a chip test fixture. The chip test fixture comprises a heat conduction base, a probe mechanism and a heat dissipation mechanism, a containing groove is formed in the middle of the heat conduction base, a positioning frame...

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Hauptverfasser: JI YINGDONG, HOU QISHENG, GAO ZONGYING
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creator JI YINGDONG
HOU QISHENG
GAO ZONGYING
description The invention belongs to the technical field of semiconductors, and discloses a chip test fixture. The chip test fixture comprises a heat conduction base, a probe mechanism and a heat dissipation mechanism, a containing groove is formed in the middle of the heat conduction base, a positioning frame is arranged in the containing groove, and the positioning frame is used for positioning a product in the containing groove; the probe mechanism is arranged on the side, away from the containing groove, of the heat conduction base, the detection end of the probe mechanism penetrates through the groove bottom of the containing groove to be electrically connected with a product, so that the chip is tested, the heat dissipation mechanism comprises heat dissipation fin assemblies and a heat dissipation fan, and the two heat dissipation fin assemblies are symmetrically arranged on the heat conduction base to define a heat dissipation space; one side, deviating from the heat dissipation space, of each heat dissipation fin
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN116520139A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN116520139A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN116520139A3</originalsourceid><addsrcrecordid>eNrjZBB0zsgsUChJLS5RSMusKCktSuVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfHOfoaGZqZGBobGlo7GxKgBAMWnH3s</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Chip test fixture</title><source>esp@cenet</source><creator>JI YINGDONG ; HOU QISHENG ; GAO ZONGYING</creator><creatorcontrib>JI YINGDONG ; HOU QISHENG ; GAO ZONGYING</creatorcontrib><description>The invention belongs to the technical field of semiconductors, and discloses a chip test fixture. The chip test fixture comprises a heat conduction base, a probe mechanism and a heat dissipation mechanism, a containing groove is formed in the middle of the heat conduction base, a positioning frame is arranged in the containing groove, and the positioning frame is used for positioning a product in the containing groove; the probe mechanism is arranged on the side, away from the containing groove, of the heat conduction base, the detection end of the probe mechanism penetrates through the groove bottom of the containing groove to be electrically connected with a product, so that the chip is tested, the heat dissipation mechanism comprises heat dissipation fin assemblies and a heat dissipation fan, and the two heat dissipation fin assemblies are symmetrically arranged on the heat conduction base to define a heat dissipation space; one side, deviating from the heat dissipation space, of each heat dissipation fin</description><language>chi ; eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; PRINTED CIRCUITS ; TESTING</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230801&amp;DB=EPODOC&amp;CC=CN&amp;NR=116520139A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230801&amp;DB=EPODOC&amp;CC=CN&amp;NR=116520139A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JI YINGDONG</creatorcontrib><creatorcontrib>HOU QISHENG</creatorcontrib><creatorcontrib>GAO ZONGYING</creatorcontrib><title>Chip test fixture</title><description>The invention belongs to the technical field of semiconductors, and discloses a chip test fixture. The chip test fixture comprises a heat conduction base, a probe mechanism and a heat dissipation mechanism, a containing groove is formed in the middle of the heat conduction base, a positioning frame is arranged in the containing groove, and the positioning frame is used for positioning a product in the containing groove; the probe mechanism is arranged on the side, away from the containing groove, of the heat conduction base, the detection end of the probe mechanism penetrates through the groove bottom of the containing groove to be electrically connected with a product, so that the chip is tested, the heat dissipation mechanism comprises heat dissipation fin assemblies and a heat dissipation fan, and the two heat dissipation fin assemblies are symmetrically arranged on the heat conduction base to define a heat dissipation space; one side, deviating from the heat dissipation space, of each heat dissipation fin</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>PRINTED CIRCUITS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBB0zsgsUChJLS5RSMusKCktSuVhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfHOfoaGZqZGBobGlo7GxKgBAMWnH3s</recordid><startdate>20230801</startdate><enddate>20230801</enddate><creator>JI YINGDONG</creator><creator>HOU QISHENG</creator><creator>GAO ZONGYING</creator><scope>EVB</scope></search><sort><creationdate>20230801</creationdate><title>Chip test fixture</title><author>JI YINGDONG ; HOU QISHENG ; GAO ZONGYING</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN116520139A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>PRINTED CIRCUITS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>JI YINGDONG</creatorcontrib><creatorcontrib>HOU QISHENG</creatorcontrib><creatorcontrib>GAO ZONGYING</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JI YINGDONG</au><au>HOU QISHENG</au><au>GAO ZONGYING</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Chip test fixture</title><date>2023-08-01</date><risdate>2023</risdate><abstract>The invention belongs to the technical field of semiconductors, and discloses a chip test fixture. The chip test fixture comprises a heat conduction base, a probe mechanism and a heat dissipation mechanism, a containing groove is formed in the middle of the heat conduction base, a positioning frame is arranged in the containing groove, and the positioning frame is used for positioning a product in the containing groove; the probe mechanism is arranged on the side, away from the containing groove, of the heat conduction base, the detection end of the probe mechanism penetrates through the groove bottom of the containing groove to be electrically connected with a product, so that the chip is tested, the heat dissipation mechanism comprises heat dissipation fin assemblies and a heat dissipation fan, and the two heat dissipation fin assemblies are symmetrically arranged on the heat conduction base to define a heat dissipation space; one side, deviating from the heat dissipation space, of each heat dissipation fin</abstract><oa>free_for_read</oa></addata></record>
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subjects CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
PRINTED CIRCUITS
TESTING
title Chip test fixture
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T08%3A28%3A12IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=JI%20YINGDONG&rft.date=2023-08-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN116520139A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true