Method for configuring plurality of input-output channels
A system includes: an interposer including a plurality of conductive interconnects; a plurality of chiplets disposed on the interposer and interconnected through the interposer; each chiplet includes a die-to-die physical layer interface including one or more pads to engage the interconnects of the...
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creator | WALKER DAVID E BREWER TONY M |
description | A system includes: an interposer including a plurality of conductive interconnects; a plurality of chiplets disposed on the interposer and interconnected through the interposer; each chiplet includes a die-to-die physical layer interface including one or more pads to engage the interconnects of the interposer; and wherein at least one chiplet comprises a plurality of input-output channels organized in at least one column and arranged in an order at a periphery of the chiplet, thereby forming a die-to-die physical layer interface to engage the interconnects of the interposer, wherein the order of the channels of the column is programmable.
一种系统包括:包含多个导电互连件的中介层;布置在所述中介层上且通过所述中介层互连的多个小芯片;每个小芯片包含裸片到裸片物理层接口,其包含用以接合所述中介层的所述互连件的一或多个衬垫;并且其中至少一个小芯片包含多个输入-输出信道,所述信道组织成至少一个列且按某一次序布置在所述小芯片的外围处,从而形成用以接合所述中介层的所述互连件的裸片到裸片物理层接口,其中所述列的所述信道的所述次序是可编程的。 |
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一种系统包括:包含多个导电互连件的中介层;布置在所述中介层上且通过所述中介层互连的多个小芯片;每个小芯片包含裸片到裸片物理层接口,其包含用以接合所述中介层的所述互连件的一或多个衬垫;并且其中至少一个小芯片包含多个输入-输出信道,所述信道组织成至少一个列且按某一次序布置在所述小芯片的外围处,从而形成用以接合所述中介层的所述互连件的裸片到裸片物理层接口,其中所述列的所述信道的所述次序是可编程的。</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230623&DB=EPODOC&CC=CN&NR=116324753A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230623&DB=EPODOC&CC=CN&NR=116324753A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WALKER DAVID E</creatorcontrib><creatorcontrib>BREWER TONY M</creatorcontrib><title>Method for configuring plurality of input-output channels</title><description>A system includes: an interposer including a plurality of conductive interconnects; a plurality of chiplets disposed on the interposer and interconnected through the interposer; each chiplet includes a die-to-die physical layer interface including one or more pads to engage the interconnects of the interposer; and wherein at least one chiplet comprises a plurality of input-output channels organized in at least one column and arranged in an order at a periphery of the chiplet, thereby forming a die-to-die physical layer interface to engage the interconnects of the interposer, wherein the order of the channels of the column is programmable.
一种系统包括:包含多个导电互连件的中介层;布置在所述中介层上且通过所述中介层互连的多个小芯片;每个小芯片包含裸片到裸片物理层接口,其包含用以接合所述中介层的所述互连件的一或多个衬垫;并且其中至少一个小芯片包含多个输入-输出信道,所述信道组织成至少一个列且按某一次序布置在所述小芯片的外围处,从而形成用以接合所述中介层的所述互连件的裸片到裸片物理层接口,其中所述列的所述信道的所述次序是可编程的。</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLD0TS3JyE9RSMsvUkjOz0vLTC8tysxLVyjIKS1KzMksqVTIT1PIzCsoLdHNLy0BUgrJGYl5eak5xTwMrGmJOcWpvFCam0HRzTXE2UM3tSA_PrW4IDE5NS-1JN7Zz9DQzNjIxNzU2NGYGDUAezQvOA</recordid><startdate>20230623</startdate><enddate>20230623</enddate><creator>WALKER DAVID E</creator><creator>BREWER TONY M</creator><scope>EVB</scope></search><sort><creationdate>20230623</creationdate><title>Method for configuring plurality of input-output channels</title><author>WALKER DAVID E ; BREWER TONY M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN116324753A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>WALKER DAVID E</creatorcontrib><creatorcontrib>BREWER TONY M</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WALKER DAVID E</au><au>BREWER TONY M</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for configuring plurality of input-output channels</title><date>2023-06-23</date><risdate>2023</risdate><abstract>A system includes: an interposer including a plurality of conductive interconnects; a plurality of chiplets disposed on the interposer and interconnected through the interposer; each chiplet includes a die-to-die physical layer interface including one or more pads to engage the interconnects of the interposer; and wherein at least one chiplet comprises a plurality of input-output channels organized in at least one column and arranged in an order at a periphery of the chiplet, thereby forming a die-to-die physical layer interface to engage the interconnects of the interposer, wherein the order of the channels of the column is programmable.
一种系统包括:包含多个导电互连件的中介层;布置在所述中介层上且通过所述中介层互连的多个小芯片;每个小芯片包含裸片到裸片物理层接口,其包含用以接合所述中介层的所述互连件的一或多个衬垫;并且其中至少一个小芯片包含多个输入-输出信道,所述信道组织成至少一个列且按某一次序布置在所述小芯片的外围处,从而形成用以接合所述中介层的所述互连件的裸片到裸片物理层接口,其中所述列的所述信道的所述次序是可编程的。</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | Method for configuring plurality of input-output channels |
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