ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF

The invention relates to an electronic package and a manufacturing method thereof, mainly comprising forming a protective layer on an electronic structure having a plurality of conductors so that the protective layer covers the plurality of conductors, forming a plurality of grooves on one side of a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: FENG JUNHAO, LUO YUMIN, LIN YOUCHEN, YU GUOHUA
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The invention relates to an electronic package and a manufacturing method thereof, mainly comprising forming a protective layer on an electronic structure having a plurality of conductors so that the protective layer covers the plurality of conductors, forming a plurality of grooves on one side of a dielectric layer, and bonding the electronic structure with the protective layer on the electronic structure to the dielectric layer, one side of the dielectric layer is provided with a plurality of grooves, the plurality of conductors are correspondingly accommodated in the grooves, and then conductive elements are formed on the other side of the dielectric layer, so that the grooves are designed to correspond to the high and low surfaces of the electronic structure, and the problem of poor manufacturing process is avoided. 本发明涉及一种电子封装件及其制法,主要包括于一具有多个导电体的电子结构上形成一保护层,以令该保护层包覆该多个导电体,且于一介电层的其中一侧形成多个凹槽,再将该电子结构以其上的保护层结合该介电层,并使该多个导电体对应容置于各该凹槽中,之后将导电元件形成于该介电层的另一侧上,故经由该凹槽的设计,以对应该电子结构的高低表面,而避免发生制程不良的问题。