ADC sampling jitter elimination method and device based on integral model

ADC sampling jitter elimination method and device based on integral model

The invention is suitable for the technical field of data processing, and particularly relates to an ADC sampling jitter elimination method based on an integral model, and the method comprises the following steps: obtaining an ADC sampling value; comparing the ADC sampling value with a preset limit...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: XIE SHANG, XIE XIUFEN
Format: Patent
Sprache:chi ; eng
Schlagworte:
ANALOGUE COMPUTERS
CALCULATING
COMPUTING
COUNTING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator XIE SHANG
XIE XIUFEN
description The invention is suitable for the technical field of data processing, and particularly relates to an ADC sampling jitter elimination method based on an integral model, and the method comprises the following steps: obtaining an ADC sampling value; comparing the ADC sampling value with a preset limit value of an integration region, and if it is judged that the ADC sampling value does not exceed the preset limit value; if so, adding 1 to an integral value of an integral region corresponding to the ADC sampling value; finding out the maximum integral value in the integral region; and outputting the ADC sampling value corresponding to the maximum integral value as a sampling result. The invention further provides an ADC sampling jitter elimination device based on the integral model, computer equipment and a computer readable storage medium. According to the ADC sampling jitter elimination method based on the integral model provided by the embodiment of the invention, the mathematical integral model is utilized to
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN116050439A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN116050439A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN116050439A3</originalsourceid><addsrcrecordid>eNqNyj0KwkAQhuFtLES9w3gAISEqWIZV0cbKPozZL3Fk_8gOnl8LD2D1Fs87N9f2aKlwyF7iSC9RxUTwEiSySooUoM_kiKMjh7f0oAcXOPqSRMU4saeQHPzSzAb2BatfF2Z9Pt3tZYOcOpTMPSK0s7e63le7atsc2uaf5wOZRjQf</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ADC sampling jitter elimination method and device based on integral model</title><source>esp@cenet</source><creator>XIE SHANG ; XIE XIUFEN</creator><creatorcontrib>XIE SHANG ; XIE XIUFEN</creatorcontrib><description>The invention is suitable for the technical field of data processing, and particularly relates to an ADC sampling jitter elimination method based on an integral model, and the method comprises the following steps: obtaining an ADC sampling value; comparing the ADC sampling value with a preset limit value of an integration region, and if it is judged that the ADC sampling value does not exceed the preset limit value; if so, adding 1 to an integral value of an integral region corresponding to the ADC sampling value; finding out the maximum integral value in the integral region; and outputting the ADC sampling value corresponding to the maximum integral value as a sampling result. The invention further provides an ADC sampling jitter elimination device based on the integral model, computer equipment and a computer readable storage medium. According to the ADC sampling jitter elimination method based on the integral model provided by the embodiment of the invention, the mathematical integral model is utilized to</description><language>chi ; eng</language><subject>ANALOGUE COMPUTERS ; CALCULATING ; COMPUTING ; COUNTING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230502&amp;DB=EPODOC&amp;CC=CN&amp;NR=116050439A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230502&amp;DB=EPODOC&amp;CC=CN&amp;NR=116050439A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>XIE SHANG</creatorcontrib><creatorcontrib>XIE XIUFEN</creatorcontrib><title>ADC sampling jitter elimination method and device based on integral model</title><description>The invention is suitable for the technical field of data processing, and particularly relates to an ADC sampling jitter elimination method based on an integral model, and the method comprises the following steps: obtaining an ADC sampling value; comparing the ADC sampling value with a preset limit value of an integration region, and if it is judged that the ADC sampling value does not exceed the preset limit value; if so, adding 1 to an integral value of an integral region corresponding to the ADC sampling value; finding out the maximum integral value in the integral region; and outputting the ADC sampling value corresponding to the maximum integral value as a sampling result. The invention further provides an ADC sampling jitter elimination device based on the integral model, computer equipment and a computer readable storage medium. According to the ADC sampling jitter elimination method based on the integral model provided by the embodiment of the invention, the mathematical integral model is utilized to</description><subject>ANALOGUE COMPUTERS</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyj0KwkAQhuFtLES9w3gAISEqWIZV0cbKPozZL3Fk_8gOnl8LD2D1Fs87N9f2aKlwyF7iSC9RxUTwEiSySooUoM_kiKMjh7f0oAcXOPqSRMU4saeQHPzSzAb2BatfF2Z9Pt3tZYOcOpTMPSK0s7e63le7atsc2uaf5wOZRjQf</recordid><startdate>20230502</startdate><enddate>20230502</enddate><creator>XIE SHANG</creator><creator>XIE XIUFEN</creator><scope>EVB</scope></search><sort><creationdate>20230502</creationdate><title>ADC sampling jitter elimination method and device based on integral model</title><author>XIE SHANG ; XIE XIUFEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN116050439A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>ANALOGUE COMPUTERS</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>XIE SHANG</creatorcontrib><creatorcontrib>XIE XIUFEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>XIE SHANG</au><au>XIE XIUFEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ADC sampling jitter elimination method and device based on integral model</title><date>2023-05-02</date><risdate>2023</risdate><abstract>The invention is suitable for the technical field of data processing, and particularly relates to an ADC sampling jitter elimination method based on an integral model, and the method comprises the following steps: obtaining an ADC sampling value; comparing the ADC sampling value with a preset limit value of an integration region, and if it is judged that the ADC sampling value does not exceed the preset limit value; if so, adding 1 to an integral value of an integral region corresponding to the ADC sampling value; finding out the maximum integral value in the integral region; and outputting the ADC sampling value corresponding to the maximum integral value as a sampling result. The invention further provides an ADC sampling jitter elimination device based on the integral model, computer equipment and a computer readable storage medium. According to the ADC sampling jitter elimination method based on the integral model provided by the embodiment of the invention, the mathematical integral model is utilized to</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN116050439A
source esp@cenet
subjects ANALOGUE COMPUTERS
CALCULATING
COMPUTING
COUNTING
PHYSICS
title ADC sampling jitter elimination method and device based on integral model
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-29T08%3A41%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=XIE%20SHANG&rft.date=2023-05-02&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN116050439A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true