Method for designing SOI pressure sensitive chip with symmetrical positive and negative pressure
The invention discloses a method for designing an SOI pressure sensitive chip with symmetrical positive and negative pressure, which comprises the following steps of: designing two different areas of the center and the edge of a sensitive diaphragm according to a pressure sensitive resistor, and per...
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| creator | NIU MENGXIAO TIAN KAIFANG GAO GUOMIN CHEN LINYU ZHOU LANSHENG ZHU NING HUANG WEI |
| description | The invention discloses a method for designing an SOI pressure sensitive chip with symmetrical positive and negative pressure, which comprises the following steps of: designing two different areas of the center and the edge of a sensitive diaphragm according to a pressure sensitive resistor, and performing stress simulation analysis on the sensitive diaphragm; the area of the pressure sensitive resistor is determined according to the position where the maximum strain force occurs, the distance between the pressure sensitive resistor and the position where the maximum strain force occurs is determined, the position where the maximum strain force occurs is the root position of the corrosion slope, and when the same pressure is applied to the front face and the back face of the chip, the corrosion slope is located. Positive and negative strain and displacement changes in the two directions are equal, it is guaranteed that the sensitive resistor is located at the position of the elastic diaphragm, the pressure se |
| format | Patent |
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Positive and negative strain and displacement changes in the two directions are equal, it is guaranteed that the sensitive resistor is located at the position of the elastic diaphragm, the pressure se</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | MEASURING MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER,MECHANICAL EFFICIENCY, OR FLUID PRESSURE MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES MICROSTRUCTURAL TECHNOLOGY PERFORMING OPERATIONS PHYSICS TESTING TRANSPORTING |
| title | Method for designing SOI pressure sensitive chip with symmetrical positive and negative pressure |
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