PROFINET SoC chip architecture supporting IRT

The invention discloses a PROFINET SoC chip architecture supporting IRT, the chip architecture comprises an RISC-V CPU module, a PROFINET IP module, an IEC 1158 frame encoding/decoding module, a Manchester encoding/decoding module, an RAM data storage module, a CRC frame verification module, a DMA module and a MEMORY module, and AXI4 communication relations among the modules, the chip architecture realizes flexible programmability and communication hardware acceleration performance by designing an RISC-V CPU + FPGA heterogeneous SOC; and the Program system and the Program logic are communicated with each other through an AXI4 on-chip bus, so that the efficient and accurate transmission of on-chip data is realized. 本发明公开了一种支持IRT的PROFINET SoC芯片架构，包括包含RISC-V CPU模块、PROFINET IP模块、IEC 1158帧编/解码模块、Manchester编/解码模块、RAM数据存储模块、CRC帧校验模块、DMA模块和MEMORY模块，以及各模块之间的AXI4通讯关系，本发明通过设计RISC-V CPU+FPGA异构SOC，实现灵活的可编程性和通讯硬件加速性能；Programming system和Programmable logic之间通过AXI4片内总线通讯，实现片内数据高效，准确传输。