Annular chained media processing method and system

Annular chained media processing method and system

The invention discloses an annular chain type media processing method and system, and the system comprises the steps: a first processing node is connected with a second processing node, an nth processing node is connected with an (n-1) th node, and the nth processing node is connected with the first...

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1. Verfasser: YAO ZEXIN
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Sprache:chi ; eng
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ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
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description The invention discloses an annular chain type media processing method and system, and the system comprises the steps: a first processing node is connected with a second processing node, an nth processing node is connected with an (n-1) th node, and the nth processing node is connected with the first processing node to obtain an annular chain type processing node, the first processing node to the nth processing node are media processing chips or annular chain type sub-processing nodes, the first sub-processing node is connected with the second sub-processing node, the nth sub-processing node is connected with the (n-1) th sub-node, the nth sub-processing node is connected with the first sub-processing node to obtain the annular chain type sub-processing node, and the nth sub-processing node is connected with the nth sub-processing node. According to the invention, the media processing chips operate independently and have high-concurrency media processing capability, when one or more media processing chips are
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN115866187A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN115866187A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN115866187A3</originalsourceid><addsrcrecordid>eNrjZDByzMsrzUksUkjOSMzMS01RyE1NyUxUKCjKT04tLs7MSwcKlGTkpygk5qUoFFcWl6Tm8jCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSSeGc_Q0NTCzMzQwtzR2Ni1AAAyPIsIg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Annular chained media processing method and system</title><source>esp@cenet</source><creator>YAO ZEXIN</creator><creatorcontrib>YAO ZEXIN</creatorcontrib><description>The invention discloses an annular chain type media processing method and system, and the system comprises the steps: a first processing node is connected with a second processing node, an nth processing node is connected with an (n-1) th node, and the nth processing node is connected with the first processing node to obtain an annular chain type processing node, the first processing node to the nth processing node are media processing chips or annular chain type sub-processing nodes, the first sub-processing node is connected with the second sub-processing node, the nth sub-processing node is connected with the (n-1) th sub-node, the nth sub-processing node is connected with the first sub-processing node to obtain the annular chain type sub-processing node, and the nth sub-processing node is connected with the nth sub-processing node. According to the invention, the media processing chips operate independently and have high-concurrency media processing capability, when one or more media processing chips are</description><language>chi ; eng</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230328&amp;DB=EPODOC&amp;CC=CN&amp;NR=115866187A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230328&amp;DB=EPODOC&amp;CC=CN&amp;NR=115866187A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YAO ZEXIN</creatorcontrib><title>Annular chained media processing method and system</title><description>The invention discloses an annular chain type media processing method and system, and the system comprises the steps: a first processing node is connected with a second processing node, an nth processing node is connected with an (n-1) th node, and the nth processing node is connected with the first processing node to obtain an annular chain type processing node, the first processing node to the nth processing node are media processing chips or annular chain type sub-processing nodes, the first sub-processing node is connected with the second sub-processing node, the nth sub-processing node is connected with the (n-1) th sub-node, the nth sub-processing node is connected with the first sub-processing node to obtain the annular chain type sub-processing node, and the nth sub-processing node is connected with the nth sub-processing node. According to the invention, the media processing chips operate independently and have high-concurrency media processing capability, when one or more media processing chips are</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>PICTORIAL COMMUNICATION, e.g. TELEVISION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDByzMsrzUksUkjOSMzMS01RyE1NyUxUKCjKT04tLs7MSwcKlGTkpygk5qUoFFcWl6Tm8jCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSSeGc_Q0NTCzMzQwtzR2Ni1AAAyPIsIg</recordid><startdate>20230328</startdate><enddate>20230328</enddate><creator>YAO ZEXIN</creator><scope>EVB</scope></search><sort><creationdate>20230328</creationdate><title>Annular chained media processing method and system</title><author>YAO ZEXIN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN115866187A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>PICTORIAL COMMUNICATION, e.g. TELEVISION</topic><toplevel>online_resources</toplevel><creatorcontrib>YAO ZEXIN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YAO ZEXIN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Annular chained media processing method and system</title><date>2023-03-28</date><risdate>2023</risdate><abstract>The invention discloses an annular chain type media processing method and system, and the system comprises the steps: a first processing node is connected with a second processing node, an nth processing node is connected with an (n-1) th node, and the nth processing node is connected with the first processing node to obtain an annular chain type processing node, the first processing node to the nth processing node are media processing chips or annular chain type sub-processing nodes, the first sub-processing node is connected with the second sub-processing node, the nth sub-processing node is connected with the (n-1) th sub-node, the nth sub-processing node is connected with the first sub-processing node to obtain the annular chain type sub-processing node, and the nth sub-processing node is connected with the nth sub-processing node. According to the invention, the media processing chips operate independently and have high-concurrency media processing capability, when one or more media processing chips are</abstract><oa>free_for_read</oa></addata></record>
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
title Annular chained media processing method and system
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-02T06%3A56%3A45IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=YAO%20ZEXIN&rft.date=2023-03-28&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN115866187A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true