Manufacturing method of deep trench isolation structure with ultrahigh depth-to-width ratio
The invention provides a manufacturing method of a deep trench isolation structure with an ultrahigh depth-to-width ratio, and the method comprises the steps: providing a substrate, sequentially forming a first dielectric layer, a first silicon nitride layer, a second dielectric layer, a second sili...
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creator | ZHANG SHOULONG LEE JONG-WOOK LI LIN LIANG JIN'E TAN JUAN TANG AXIN WANG YAN GUAN YUSONG |
description | The invention provides a manufacturing method of a deep trench isolation structure with an ultrahigh depth-to-width ratio, and the method comprises the steps: providing a substrate, sequentially forming a first dielectric layer, a first silicon nitride layer, a second dielectric layer, a second silicon nitride layer and a third dielectric layer on the substrate, and forming a shallow trench isolation structure in the first silicon nitride layer, the first dielectric layer and the substrate; etching the third dielectric layer, the second silicon nitride layer, the second dielectric layer, the shallow trench isolation structure and the substrate to form a trench of the deep trench isolation structure; forming a lining oxide layer on the inner wall of the groove; depositing a first high-density plasma film layer in the groove; depositing a high aspect ratio process film layer in the groove to form an air gap; and depositing a second high-density plasma film layer in the groove. According to the invention, the di |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN115799163A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN115799163A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN115799163A3</originalsourceid><addsrcrecordid>eNqNyjEKwjAUgOEuDqLe4XmADKGodCxFcdHJzaGE5KV5EJOQvNDr24IHcPqH_9s274cK1SrNNVOY4IPsooFowSAm4IxBO6ASvWKKAQrnulqEmdhB9ZyVo8ktPLETHMVMZhl55ftmY5UvePh11xxv19dwF5jiiCUpjQF5HJ5Sni5dJ89t3_5jvtBTPDo</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Manufacturing method of deep trench isolation structure with ultrahigh depth-to-width ratio</title><source>esp@cenet</source><creator>ZHANG SHOULONG ; LEE JONG-WOOK ; LI LIN ; LIANG JIN'E ; TAN JUAN ; TANG AXIN ; WANG YAN ; GUAN YUSONG</creator><creatorcontrib>ZHANG SHOULONG ; LEE JONG-WOOK ; LI LIN ; LIANG JIN'E ; TAN JUAN ; TANG AXIN ; WANG YAN ; GUAN YUSONG</creatorcontrib><description>The invention provides a manufacturing method of a deep trench isolation structure with an ultrahigh depth-to-width ratio, and the method comprises the steps: providing a substrate, sequentially forming a first dielectric layer, a first silicon nitride layer, a second dielectric layer, a second silicon nitride layer and a third dielectric layer on the substrate, and forming a shallow trench isolation structure in the first silicon nitride layer, the first dielectric layer and the substrate; etching the third dielectric layer, the second silicon nitride layer, the second dielectric layer, the shallow trench isolation structure and the substrate to form a trench of the deep trench isolation structure; forming a lining oxide layer on the inner wall of the groove; depositing a first high-density plasma film layer in the groove; depositing a high aspect ratio process film layer in the groove to form an air gap; and depositing a second high-density plasma film layer in the groove. According to the invention, the di</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230314&DB=EPODOC&CC=CN&NR=115799163A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230314&DB=EPODOC&CC=CN&NR=115799163A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ZHANG SHOULONG</creatorcontrib><creatorcontrib>LEE JONG-WOOK</creatorcontrib><creatorcontrib>LI LIN</creatorcontrib><creatorcontrib>LIANG JIN'E</creatorcontrib><creatorcontrib>TAN JUAN</creatorcontrib><creatorcontrib>TANG AXIN</creatorcontrib><creatorcontrib>WANG YAN</creatorcontrib><creatorcontrib>GUAN YUSONG</creatorcontrib><title>Manufacturing method of deep trench isolation structure with ultrahigh depth-to-width ratio</title><description>The invention provides a manufacturing method of a deep trench isolation structure with an ultrahigh depth-to-width ratio, and the method comprises the steps: providing a substrate, sequentially forming a first dielectric layer, a first silicon nitride layer, a second dielectric layer, a second silicon nitride layer and a third dielectric layer on the substrate, and forming a shallow trench isolation structure in the first silicon nitride layer, the first dielectric layer and the substrate; etching the third dielectric layer, the second silicon nitride layer, the second dielectric layer, the shallow trench isolation structure and the substrate to form a trench of the deep trench isolation structure; forming a lining oxide layer on the inner wall of the groove; depositing a first high-density plasma film layer in the groove; depositing a high aspect ratio process film layer in the groove to form an air gap; and depositing a second high-density plasma film layer in the groove. According to the invention, the di</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyjEKwjAUgOEuDqLe4XmADKGodCxFcdHJzaGE5KV5EJOQvNDr24IHcPqH_9s274cK1SrNNVOY4IPsooFowSAm4IxBO6ASvWKKAQrnulqEmdhB9ZyVo8ktPLETHMVMZhl55ftmY5UvePh11xxv19dwF5jiiCUpjQF5HJ5Sni5dJ89t3_5jvtBTPDo</recordid><startdate>20230314</startdate><enddate>20230314</enddate><creator>ZHANG SHOULONG</creator><creator>LEE JONG-WOOK</creator><creator>LI LIN</creator><creator>LIANG JIN'E</creator><creator>TAN JUAN</creator><creator>TANG AXIN</creator><creator>WANG YAN</creator><creator>GUAN YUSONG</creator><scope>EVB</scope></search><sort><creationdate>20230314</creationdate><title>Manufacturing method of deep trench isolation structure with ultrahigh depth-to-width ratio</title><author>ZHANG SHOULONG ; LEE JONG-WOOK ; LI LIN ; LIANG JIN'E ; TAN JUAN ; TANG AXIN ; WANG YAN ; GUAN YUSONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN115799163A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>ZHANG SHOULONG</creatorcontrib><creatorcontrib>LEE JONG-WOOK</creatorcontrib><creatorcontrib>LI LIN</creatorcontrib><creatorcontrib>LIANG JIN'E</creatorcontrib><creatorcontrib>TAN JUAN</creatorcontrib><creatorcontrib>TANG AXIN</creatorcontrib><creatorcontrib>WANG YAN</creatorcontrib><creatorcontrib>GUAN YUSONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ZHANG SHOULONG</au><au>LEE JONG-WOOK</au><au>LI LIN</au><au>LIANG JIN'E</au><au>TAN JUAN</au><au>TANG AXIN</au><au>WANG YAN</au><au>GUAN YUSONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Manufacturing method of deep trench isolation structure with ultrahigh depth-to-width ratio</title><date>2023-03-14</date><risdate>2023</risdate><abstract>The invention provides a manufacturing method of a deep trench isolation structure with an ultrahigh depth-to-width ratio, and the method comprises the steps: providing a substrate, sequentially forming a first dielectric layer, a first silicon nitride layer, a second dielectric layer, a second silicon nitride layer and a third dielectric layer on the substrate, and forming a shallow trench isolation structure in the first silicon nitride layer, the first dielectric layer and the substrate; etching the third dielectric layer, the second silicon nitride layer, the second dielectric layer, the shallow trench isolation structure and the substrate to form a trench of the deep trench isolation structure; forming a lining oxide layer on the inner wall of the groove; depositing a first high-density plasma film layer in the groove; depositing a high aspect ratio process film layer in the groove to form an air gap; and depositing a second high-density plasma film layer in the groove. According to the invention, the di</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Manufacturing method of deep trench isolation structure with ultrahigh depth-to-width ratio |
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