Hard mask structure for integrated circuit manufacturing and integrated circuit device manufacturing method
The invention provides a hard mask structure for integrated circuit manufacturing and an integrated circuit device manufacturing method, and relates to the technical field of pattern transfer in the chip manufacturing process. The hard mask structure comprises a first hard mask layer and a second ha...
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creator | HE XIAOBIN WANG WENWU GAO JIANFENG WEI YAYI YANG TAO DAI BOWEI LI JUNJIE |
description | The invention provides a hard mask structure for integrated circuit manufacturing and an integrated circuit device manufacturing method, and relates to the technical field of pattern transfer in the chip manufacturing process. The hard mask structure comprises a first hard mask layer and a second hard mask layer which are stacked from top to bottom, the surface of the first hard mask layer is used for forming precious metal and serves as a pattern transfer sacrificial layer, and the second hard mask layer serves as a protective layer and is used for etching a to-be-transferred pattern material; the first hard mask layer and the second hard mask layer are made of different materials and can resist corrosion of strong oxidizing chemical liquid for removing the noble metal; the second hard mask layer is resistant to corrosion of chemical liquid for removing the first hard mask layer through wet etching, and it is guaranteed that the first hard mask layer has a preset corrosion rate selection ratio. The device ca |
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The hard mask structure comprises a first hard mask layer and a second hard mask layer which are stacked from top to bottom, the surface of the first hard mask layer is used for forming precious metal and serves as a pattern transfer sacrificial layer, and the second hard mask layer serves as a protective layer and is used for etching a to-be-transferred pattern material; the first hard mask layer and the second hard mask layer are made of different materials and can resist corrosion of strong oxidizing chemical liquid for removing the noble metal; the second hard mask layer is resistant to corrosion of chemical liquid for removing the first hard mask layer through wet etching, and it is guaranteed that the first hard mask layer has a preset corrosion rate selection ratio. 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The hard mask structure comprises a first hard mask layer and a second hard mask layer which are stacked from top to bottom, the surface of the first hard mask layer is used for forming precious metal and serves as a pattern transfer sacrificial layer, and the second hard mask layer serves as a protective layer and is used for etching a to-be-transferred pattern material; the first hard mask layer and the second hard mask layer are made of different materials and can resist corrosion of strong oxidizing chemical liquid for removing the noble metal; the second hard mask layer is resistant to corrosion of chemical liquid for removing the first hard mask layer through wet etching, and it is guaranteed that the first hard mask layer has a preset corrosion rate selection ratio. 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The hard mask structure comprises a first hard mask layer and a second hard mask layer which are stacked from top to bottom, the surface of the first hard mask layer is used for forming precious metal and serves as a pattern transfer sacrificial layer, and the second hard mask layer serves as a protective layer and is used for etching a to-be-transferred pattern material; the first hard mask layer and the second hard mask layer are made of different materials and can resist corrosion of strong oxidizing chemical liquid for removing the noble metal; the second hard mask layer is resistant to corrosion of chemical liquid for removing the first hard mask layer through wet etching, and it is guaranteed that the first hard mask layer has a preset corrosion rate selection ratio. The device ca</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Hard mask structure for integrated circuit manufacturing and integrated circuit device manufacturing method |
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