Semiconductor element
A semiconductor device includes a semiconductor stack including an active layer, a first semiconductor structure, a second semiconductor structure, a third semiconductor layer, a dielectric layer, and a reflective layer under the third semiconductor layer. The first semiconductor structure is provid...
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creator | ZHENG WEIWEN CHEN YIMING ZHANG JUNWEI OU ZHEN LIN JUNYU LI JUNYI QIU YIYANG WU CHANGXIU LIAO WENLU |
description | A semiconductor device includes a semiconductor stack including an active layer, a first semiconductor structure, a second semiconductor structure, a third semiconductor layer, a dielectric layer, and a reflective layer under the third semiconductor layer. The first semiconductor structure is provided with a first surface, the first surface comprises a first part and a second part, the first surface is provided with a first area, the third semiconductor layer is connected with the first part and is provided with a second area, the dielectric layer is connected with the second part, the dielectric layer is provided with a plurality of open pores, and the plurality of open pores are provided with a third area; wherein the ratio of the second area to the first area is 0.1-0.7, and the ratio of the third area to the first area is less than 0.2.
本发明公开一半导体元件,其包含有半导体叠层,半导体叠层包含一主动层、一第一半导体结构、一第二半导体结构、一第三半导体层、一介电层以及一位于第三半导体层下的反射层;第一半导体结构具有一第一表面,第一表面包含一第一部分以及一第二部分,且第一表面具有一第一面积,第三半导体层连接第一部分并具有一第二面积,介电层连接第二部分,且介电层具有多个开孔,多 |
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本发明公开一半导体元件,其包含有半导体叠层,半导体叠层包含一主动层、一第一半导体结构、一第二半导体结构、一第三半导体层、一介电层以及一位于第三半导体层下的反射层;第一半导体结构具有一第一表面,第一表面包含一第一部分以及一第二部分,且第一表面具有一第一面积,第三半导体层连接第一部分并具有一第二面积,介电层连接第二部分,且介电层具有多个开孔,多</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230113&DB=EPODOC&CC=CN&NR=115602770A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230113&DB=EPODOC&CC=CN&NR=115602770A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ZHENG WEIWEN</creatorcontrib><creatorcontrib>CHEN YIMING</creatorcontrib><creatorcontrib>ZHANG JUNWEI</creatorcontrib><creatorcontrib>OU ZHEN</creatorcontrib><creatorcontrib>LIN JUNYU</creatorcontrib><creatorcontrib>LI JUNYI</creatorcontrib><creatorcontrib>QIU YIYANG</creatorcontrib><creatorcontrib>WU CHANGXIU</creatorcontrib><creatorcontrib>LIAO WENLU</creatorcontrib><title>Semiconductor element</title><description>A semiconductor device includes a semiconductor stack including an active layer, a first semiconductor structure, a second semiconductor structure, a third semiconductor layer, a dielectric layer, and a reflective layer under the third semiconductor layer. The first semiconductor structure is provided with a first surface, the first surface comprises a first part and a second part, the first surface is provided with a first area, the third semiconductor layer is connected with the first part and is provided with a second area, the dielectric layer is connected with the second part, the dielectric layer is provided with a plurality of open pores, and the plurality of open pores are provided with a third area; wherein the ratio of the second area to the first area is 0.1-0.7, and the ratio of the third area to the first area is less than 0.2.
本发明公开一半导体元件,其包含有半导体叠层,半导体叠层包含一主动层、一第一半导体结构、一第二半导体结构、一第三半导体层、一介电层以及一位于第三半导体层下的反射层;第一半导体结构具有一第一表面,第一表面包含一第一部分以及一第二部分,且第一表面具有一第一面积,第三半导体层连接第一部分并具有一第二面积,介电层连接第二部分,且介电层具有多个开孔,多</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBANTs3NTM7PSylNLskvUkjNSc1NzSvhYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GhqZmBkbm5gaOxsSoAQCQJCFf</recordid><startdate>20230113</startdate><enddate>20230113</enddate><creator>ZHENG WEIWEN</creator><creator>CHEN YIMING</creator><creator>ZHANG JUNWEI</creator><creator>OU ZHEN</creator><creator>LIN JUNYU</creator><creator>LI JUNYI</creator><creator>QIU YIYANG</creator><creator>WU CHANGXIU</creator><creator>LIAO WENLU</creator><scope>EVB</scope></search><sort><creationdate>20230113</creationdate><title>Semiconductor element</title><author>ZHENG WEIWEN ; CHEN YIMING ; ZHANG JUNWEI ; OU ZHEN ; LIN JUNYU ; LI JUNYI ; QIU YIYANG ; WU CHANGXIU ; LIAO WENLU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN115602770A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>ZHENG WEIWEN</creatorcontrib><creatorcontrib>CHEN YIMING</creatorcontrib><creatorcontrib>ZHANG JUNWEI</creatorcontrib><creatorcontrib>OU ZHEN</creatorcontrib><creatorcontrib>LIN JUNYU</creatorcontrib><creatorcontrib>LI JUNYI</creatorcontrib><creatorcontrib>QIU YIYANG</creatorcontrib><creatorcontrib>WU CHANGXIU</creatorcontrib><creatorcontrib>LIAO WENLU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ZHENG WEIWEN</au><au>CHEN YIMING</au><au>ZHANG JUNWEI</au><au>OU ZHEN</au><au>LIN JUNYU</au><au>LI JUNYI</au><au>QIU YIYANG</au><au>WU CHANGXIU</au><au>LIAO WENLU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor element</title><date>2023-01-13</date><risdate>2023</risdate><abstract>A semiconductor device includes a semiconductor stack including an active layer, a first semiconductor structure, a second semiconductor structure, a third semiconductor layer, a dielectric layer, and a reflective layer under the third semiconductor layer. The first semiconductor structure is provided with a first surface, the first surface comprises a first part and a second part, the first surface is provided with a first area, the third semiconductor layer is connected with the first part and is provided with a second area, the dielectric layer is connected with the second part, the dielectric layer is provided with a plurality of open pores, and the plurality of open pores are provided with a third area; wherein the ratio of the second area to the first area is 0.1-0.7, and the ratio of the third area to the first area is less than 0.2.
本发明公开一半导体元件,其包含有半导体叠层,半导体叠层包含一主动层、一第一半导体结构、一第二半导体结构、一第三半导体层、一介电层以及一位于第三半导体层下的反射层;第一半导体结构具有一第一表面,第一表面包含一第一部分以及一第二部分,且第一表面具有一第一面积,第三半导体层连接第一部分并具有一第二面积,介电层连接第二部分,且介电层具有多个开孔,多</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor element |
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