Circuit device with gate seal
Various examples of a circuit device including a gate stack and a gate seal are disclosed. In one example, a substrate is received, the substrate having a fin extending from the substrate. A placeholder gate is formed on the fin, and first and second gate seals are formed on sides of the placeholder...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | LAI SHENGZHOU JIANG ZONGYU |
description | Various examples of a circuit device including a gate stack and a gate seal are disclosed. In one example, a substrate is received, the substrate having a fin extending from the substrate. A placeholder gate is formed on the fin, and first and second gate seals are formed on sides of the placeholder gate. The placeholder gate is selectively removed to form a recess between side surfaces of the first gate seal and the second gate seal. A functional gate is formed within the recess between side surfaces of the first gate seal and the second gate seal. The embodiment of the invention also relates to a circuit device having the gate seal.
本发明公开了包括栅极叠层和栅极密封件的电路器件的各种示例。在一个示例中,接收衬底,衬底具有从衬底延伸的鳍。占位栅极形成在鳍上,且第一和第二栅极密封件形成在占位栅极的侧面上。选择性地去除占位栅极,以在第一栅极密封件和第二栅极密封件的侧表面之间形成凹槽。功能栅极形成在凹槽内并位于第一栅极密封件和第二栅极密封件的侧表面之间。本发明的实施例还涉及具有栅极密封件的电路器件。 |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN115101419A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN115101419A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN115101419A3</originalsourceid><addsrcrecordid>eNrjZJB1zixKLs0sUUhJLctMTlUozyzJUEhPLElVKE5NzOFhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfHOfoaGpoYGhiaGlo7GxKgBAKnGI7c</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Circuit device with gate seal</title><source>esp@cenet</source><creator>LAI SHENGZHOU ; JIANG ZONGYU</creator><creatorcontrib>LAI SHENGZHOU ; JIANG ZONGYU</creatorcontrib><description>Various examples of a circuit device including a gate stack and a gate seal are disclosed. In one example, a substrate is received, the substrate having a fin extending from the substrate. A placeholder gate is formed on the fin, and first and second gate seals are formed on sides of the placeholder gate. The placeholder gate is selectively removed to form a recess between side surfaces of the first gate seal and the second gate seal. A functional gate is formed within the recess between side surfaces of the first gate seal and the second gate seal. The embodiment of the invention also relates to a circuit device having the gate seal.
本发明公开了包括栅极叠层和栅极密封件的电路器件的各种示例。在一个示例中,接收衬底,衬底具有从衬底延伸的鳍。占位栅极形成在鳍上,且第一和第二栅极密封件形成在占位栅极的侧面上。选择性地去除占位栅极,以在第一栅极密封件和第二栅极密封件的侧表面之间形成凹槽。功能栅极形成在凹槽内并位于第一栅极密封件和第二栅极密封件的侧表面之间。本发明的实施例还涉及具有栅极密封件的电路器件。</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220923&DB=EPODOC&CC=CN&NR=115101419A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220923&DB=EPODOC&CC=CN&NR=115101419A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LAI SHENGZHOU</creatorcontrib><creatorcontrib>JIANG ZONGYU</creatorcontrib><title>Circuit device with gate seal</title><description>Various examples of a circuit device including a gate stack and a gate seal are disclosed. In one example, a substrate is received, the substrate having a fin extending from the substrate. A placeholder gate is formed on the fin, and first and second gate seals are formed on sides of the placeholder gate. The placeholder gate is selectively removed to form a recess between side surfaces of the first gate seal and the second gate seal. A functional gate is formed within the recess between side surfaces of the first gate seal and the second gate seal. The embodiment of the invention also relates to a circuit device having the gate seal.
本发明公开了包括栅极叠层和栅极密封件的电路器件的各种示例。在一个示例中,接收衬底,衬底具有从衬底延伸的鳍。占位栅极形成在鳍上,且第一和第二栅极密封件形成在占位栅极的侧面上。选择性地去除占位栅极,以在第一栅极密封件和第二栅极密封件的侧表面之间形成凹槽。功能栅极形成在凹槽内并位于第一栅极密封件和第二栅极密封件的侧表面之间。本发明的实施例还涉及具有栅极密封件的电路器件。</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJB1zixKLs0sUUhJLctMTlUozyzJUEhPLElVKE5NzOFhYE1LzClO5YXS3AyKbq4hzh66qQX58anFBYnJqXmpJfHOfoaGpoYGhiaGlo7GxKgBAKnGI7c</recordid><startdate>20220923</startdate><enddate>20220923</enddate><creator>LAI SHENGZHOU</creator><creator>JIANG ZONGYU</creator><scope>EVB</scope></search><sort><creationdate>20220923</creationdate><title>Circuit device with gate seal</title><author>LAI SHENGZHOU ; JIANG ZONGYU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN115101419A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LAI SHENGZHOU</creatorcontrib><creatorcontrib>JIANG ZONGYU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LAI SHENGZHOU</au><au>JIANG ZONGYU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Circuit device with gate seal</title><date>2022-09-23</date><risdate>2022</risdate><abstract>Various examples of a circuit device including a gate stack and a gate seal are disclosed. In one example, a substrate is received, the substrate having a fin extending from the substrate. A placeholder gate is formed on the fin, and first and second gate seals are formed on sides of the placeholder gate. The placeholder gate is selectively removed to form a recess between side surfaces of the first gate seal and the second gate seal. A functional gate is formed within the recess between side surfaces of the first gate seal and the second gate seal. The embodiment of the invention also relates to a circuit device having the gate seal.
本发明公开了包括栅极叠层和栅极密封件的电路器件的各种示例。在一个示例中,接收衬底,衬底具有从衬底延伸的鳍。占位栅极形成在鳍上,且第一和第二栅极密封件形成在占位栅极的侧面上。选择性地去除占位栅极,以在第一栅极密封件和第二栅极密封件的侧表面之间形成凹槽。功能栅极形成在凹槽内并位于第一栅极密封件和第二栅极密封件的侧表面之间。本发明的实施例还涉及具有栅极密封件的电路器件。</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_CN115101419A |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Circuit device with gate seal |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T04%3A44%3A57IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LAI%20SHENGZHOU&rft.date=2022-09-23&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN115101419A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |