LDPC decoding delay optimization method based on 5G
The invention provides an LDPC (Low Density Parity Check) decoding delay optimization method based on 5G, which comprises the following steps: S1, an ARM (Advanced RISC Machine) completes calculation of parameters required by a PUSCH (Physical Uplink Shared Channel) link processing module of each ti...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Patent |
| Sprache: | chi ; eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | LIU DUOQIANG XUE SHUNRUI BU ZHIYONG HAN XIAOMENG |
| description | The invention provides an LDPC (Low Density Parity Check) decoding delay optimization method based on 5G, which comprises the following steps: S1, an ARM (Advanced RISC Machine) completes calculation of parameters required by a PUSCH (Physical Uplink Shared Channel) link processing module of each time slot in advance through MAC (Media Access Control) scheduling information, and issues the parameters to an uplink baseband processing unit; s2, the uplink baseband processing unit receives the IQ frequency domain data, processes the IQ frequency domain data and outputs a plurality of CB code blocks; s3, whether LDPC decoding delay optimization is carried out on the CB code block is determined; s4, cutting and punching the code word check bit of the CB code block; s5, filling '0 * 00' for the initial 2Zc LLR soft values of the CB code block; s6, performing parallel LDPC (Low Density Parity Check) decoding on the CB code block; s7, reading the CB code blocks after parallel LDPC decoding, and combining the CB code |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN114866186A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN114866186A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN114866186A3</originalsourceid><addsrcrecordid>eNrjZDD2cQlwVkhJTc5PycxLBzJyEisV8gtKMnMzqxJLMvPzFHJTSzLyUxSSEotTUxSAfFN3HgbWtMSc4lReKM3NoOjmGuLsoZtakB-fWlyQmJyal1oS7-xnaGhiYWZmaGHmaEyMGgCP8it7</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>LDPC decoding delay optimization method based on 5G</title><source>esp@cenet</source><creator>LIU DUOQIANG ; XUE SHUNRUI ; BU ZHIYONG ; HAN XIAOMENG</creator><creatorcontrib>LIU DUOQIANG ; XUE SHUNRUI ; BU ZHIYONG ; HAN XIAOMENG</creatorcontrib><description>The invention provides an LDPC (Low Density Parity Check) decoding delay optimization method based on 5G, which comprises the following steps: S1, an ARM (Advanced RISC Machine) completes calculation of parameters required by a PUSCH (Physical Uplink Shared Channel) link processing module of each time slot in advance through MAC (Media Access Control) scheduling information, and issues the parameters to an uplink baseband processing unit; s2, the uplink baseband processing unit receives the IQ frequency domain data, processes the IQ frequency domain data and outputs a plurality of CB code blocks; s3, whether LDPC decoding delay optimization is carried out on the CB code block is determined; s4, cutting and punching the code word check bit of the CB code block; s5, filling '0 * 00' for the initial 2Zc LLR soft values of the CB code block; s6, performing parallel LDPC (Low Density Parity Check) decoding on the CB code block; s7, reading the CB code blocks after parallel LDPC decoding, and combining the CB code</description><language>chi ; eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220805&DB=EPODOC&CC=CN&NR=114866186A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220805&DB=EPODOC&CC=CN&NR=114866186A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LIU DUOQIANG</creatorcontrib><creatorcontrib>XUE SHUNRUI</creatorcontrib><creatorcontrib>BU ZHIYONG</creatorcontrib><creatorcontrib>HAN XIAOMENG</creatorcontrib><title>LDPC decoding delay optimization method based on 5G</title><description>The invention provides an LDPC (Low Density Parity Check) decoding delay optimization method based on 5G, which comprises the following steps: S1, an ARM (Advanced RISC Machine) completes calculation of parameters required by a PUSCH (Physical Uplink Shared Channel) link processing module of each time slot in advance through MAC (Media Access Control) scheduling information, and issues the parameters to an uplink baseband processing unit; s2, the uplink baseband processing unit receives the IQ frequency domain data, processes the IQ frequency domain data and outputs a plurality of CB code blocks; s3, whether LDPC decoding delay optimization is carried out on the CB code block is determined; s4, cutting and punching the code word check bit of the CB code block; s5, filling '0 * 00' for the initial 2Zc LLR soft values of the CB code block; s6, performing parallel LDPC (Low Density Parity Check) decoding on the CB code block; s7, reading the CB code blocks after parallel LDPC decoding, and combining the CB code</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDD2cQlwVkhJTc5PycxLBzJyEisV8gtKMnMzqxJLMvPzFHJTSzLyUxSSEotTUxSAfFN3HgbWtMSc4lReKM3NoOjmGuLsoZtakB-fWlyQmJyal1oS7-xnaGhiYWZmaGHmaEyMGgCP8it7</recordid><startdate>20220805</startdate><enddate>20220805</enddate><creator>LIU DUOQIANG</creator><creator>XUE SHUNRUI</creator><creator>BU ZHIYONG</creator><creator>HAN XIAOMENG</creator><scope>EVB</scope></search><sort><creationdate>20220805</creationdate><title>LDPC decoding delay optimization method based on 5G</title><author>LIU DUOQIANG ; XUE SHUNRUI ; BU ZHIYONG ; HAN XIAOMENG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN114866186A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2022</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>LIU DUOQIANG</creatorcontrib><creatorcontrib>XUE SHUNRUI</creatorcontrib><creatorcontrib>BU ZHIYONG</creatorcontrib><creatorcontrib>HAN XIAOMENG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIU DUOQIANG</au><au>XUE SHUNRUI</au><au>BU ZHIYONG</au><au>HAN XIAOMENG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>LDPC decoding delay optimization method based on 5G</title><date>2022-08-05</date><risdate>2022</risdate><abstract>The invention provides an LDPC (Low Density Parity Check) decoding delay optimization method based on 5G, which comprises the following steps: S1, an ARM (Advanced RISC Machine) completes calculation of parameters required by a PUSCH (Physical Uplink Shared Channel) link processing module of each time slot in advance through MAC (Media Access Control) scheduling information, and issues the parameters to an uplink baseband processing unit; s2, the uplink baseband processing unit receives the IQ frequency domain data, processes the IQ frequency domain data and outputs a plurality of CB code blocks; s3, whether LDPC decoding delay optimization is carried out on the CB code block is determined; s4, cutting and punching the code word check bit of the CB code block; s5, filling '0 * 00' for the initial 2Zc LLR soft values of the CB code block; s6, performing parallel LDPC (Low Density Parity Check) decoding on the CB code block; s7, reading the CB code blocks after parallel LDPC decoding, and combining the CB code</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | chi ; eng |
| recordid | cdi_epo_espacenet_CN114866186A |
| source | esp@cenet |
| subjects | BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
| title | LDPC decoding delay optimization method based on 5G |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T15%3A19%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LIU%20DUOQIANG&rft.date=2022-08-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN114866186A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |