Verification code synthesis method based on generative adversarial network

The invention relates to a verification code synthesis method based on a generative adversarial network. The verification code synthesis method comprises the steps of noise input, verification code generator, verification code output, integrated model recognition accuracy calculation, artificial rec...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	YAN MING, TU DEZHAN, LI QIANG, YAN JINLONG, YANG HAIFENG
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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