Stamp hole arrangement structure for PCB and corresponding PCB forming method

The invention discloses a stamp hole arrangement structure for a PCB (Printed Circuit Board), which comprises four or six stamp holes which are arranged in sequence and are positioned close to the appearance line of the current PCB, the circle centers of the two stamp holes positioned at the head pa...

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creator MO QISEN
description The invention discloses a stamp hole arrangement structure for a PCB (Printed Circuit Board), which comprises four or six stamp holes which are arranged in sequence and are positioned close to the appearance line of the current PCB, the circle centers of the two stamp holes positioned at the head part and the tail part coincide with the appearance line of the current PCB, and the two or four stamp holes positioned in the middle sink for 0.25 mm towards the interior of the PCB compared with the two stamp holes positioned at the head part and the tail part. The invention further discloses a corresponding PCB forming method after the stamp hole arrangement structure is adopted. By adopting the design scheme of the invention, an existing design method of pure linear arrangement of stamp holes is replaced, so that no connecting rib stub is formed after the stamp holes at the head and the tail are milled, and the appearance flatness of the PCB is better. 本发明公开了一种PCB用邮票孔排列结构,包括顺次排列的位于靠近当前PCB外形线的4个或6个邮票孔,位于头部和尾部的两个邮票
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN114650652A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN114650652A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN114650652A3</originalsourceid><addsrcrecordid>eNrjZPANLknMLVDIyM9JVUgsKkrMS0_NTc0rUSguKSpNLiktSlVIyy9SCHB2UkjMS1FIzi8qSi0uyM9LycxLB4sCZXNB7NzUkoz8FB4G1rTEnOJUXijNzaDo5hri7KGbWpAfD9SYmJyal1oS7-xnaGhiZmpgZmrkaEyMGgCpWTW2</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Stamp hole arrangement structure for PCB and corresponding PCB forming method</title><source>esp@cenet</source><creator>MO QISEN</creator><creatorcontrib>MO QISEN</creatorcontrib><description>The invention discloses a stamp hole arrangement structure for a PCB (Printed Circuit Board), which comprises four or six stamp holes which are arranged in sequence and are positioned close to the appearance line of the current PCB, the circle centers of the two stamp holes positioned at the head part and the tail part coincide with the appearance line of the current PCB, and the two or four stamp holes positioned in the middle sink for 0.25 mm towards the interior of the PCB compared with the two stamp holes positioned at the head part and the tail part. The invention further discloses a corresponding PCB forming method after the stamp hole arrangement structure is adopted. By adopting the design scheme of the invention, an existing design method of pure linear arrangement of stamp holes is replaced, so that no connecting rib stub is formed after the stamp holes at the head and the tail are milled, and the appearance flatness of the PCB is better. 本发明公开了一种PCB用邮票孔排列结构,包括顺次排列的位于靠近当前PCB外形线的4个或6个邮票孔,位于头部和尾部的两个邮票</description><language>chi ; eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220621&amp;DB=EPODOC&amp;CC=CN&amp;NR=114650652A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220621&amp;DB=EPODOC&amp;CC=CN&amp;NR=114650652A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MO QISEN</creatorcontrib><title>Stamp hole arrangement structure for PCB and corresponding PCB forming method</title><description>The invention discloses a stamp hole arrangement structure for a PCB (Printed Circuit Board), which comprises four or six stamp holes which are arranged in sequence and are positioned close to the appearance line of the current PCB, the circle centers of the two stamp holes positioned at the head part and the tail part coincide with the appearance line of the current PCB, and the two or four stamp holes positioned in the middle sink for 0.25 mm towards the interior of the PCB compared with the two stamp holes positioned at the head part and the tail part. The invention further discloses a corresponding PCB forming method after the stamp hole arrangement structure is adopted. By adopting the design scheme of the invention, an existing design method of pure linear arrangement of stamp holes is replaced, so that no connecting rib stub is formed after the stamp holes at the head and the tail are milled, and the appearance flatness of the PCB is better. 本发明公开了一种PCB用邮票孔排列结构,包括顺次排列的位于靠近当前PCB外形线的4个或6个邮票孔,位于头部和尾部的两个邮票</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPANLknMLVDIyM9JVUgsKkrMS0_NTc0rUSguKSpNLiktSlVIyy9SCHB2UkjMS1FIzi8qSi0uyM9LycxLB4sCZXNB7NzUkoz8FB4G1rTEnOJUXijNzaDo5hri7KGbWpAfD9SYmJyal1oS7-xnaGhiZmpgZmrkaEyMGgCpWTW2</recordid><startdate>20220621</startdate><enddate>20220621</enddate><creator>MO QISEN</creator><scope>EVB</scope></search><sort><creationdate>20220621</creationdate><title>Stamp hole arrangement structure for PCB and corresponding PCB forming method</title><author>MO QISEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN114650652A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2022</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>MO QISEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MO QISEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Stamp hole arrangement structure for PCB and corresponding PCB forming method</title><date>2022-06-21</date><risdate>2022</risdate><abstract>The invention discloses a stamp hole arrangement structure for a PCB (Printed Circuit Board), which comprises four or six stamp holes which are arranged in sequence and are positioned close to the appearance line of the current PCB, the circle centers of the two stamp holes positioned at the head part and the tail part coincide with the appearance line of the current PCB, and the two or four stamp holes positioned in the middle sink for 0.25 mm towards the interior of the PCB compared with the two stamp holes positioned at the head part and the tail part. The invention further discloses a corresponding PCB forming method after the stamp hole arrangement structure is adopted. By adopting the design scheme of the invention, an existing design method of pure linear arrangement of stamp holes is replaced, so that no connecting rib stub is formed after the stamp holes at the head and the tail are milled, and the appearance flatness of the PCB is better. 本发明公开了一种PCB用邮票孔排列结构,包括顺次排列的位于靠近当前PCB外形线的4个或6个邮票孔,位于头部和尾部的两个邮票</abstract><oa>free_for_read</oa></addata></record>
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subjects CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
title Stamp hole arrangement structure for PCB and corresponding PCB forming method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-21T04%3A59%3A22IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MO%20QISEN&rft.date=2022-06-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN114650652A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true