FinFET device and method

The present disclosure relates generally to FinFET devices and methods. A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a spacer on a sidewall of the gate stack; a source/drain region adjacent to the spacer in the fin; an interlayer dielectric layer (ILD) extending over the gate stack, the spacer, and the source/drain region; a contact plug extending through the ILD and contacting the source/drain region; a dielectric layer including a first portion on a top surface of the ILD and a second portion extending between the ILD and the contact plug, where a top surface of the second portion is closer to the substrate than the top surface of the ILD; and an air gap between the spacer and the contact plug, where the second portion of the dielectric layer seals a top of the air gap. 本公开总体涉及FinFET器件及方法。一种器件包括：鳍，从半导体衬底延伸；栅极堆叠，在鳍之上；间隔件，在栅极堆叠的侧壁上；源极/漏极区域，在鳍中与间隔件相邻；层间电介质层(ILD)，在栅极堆叠、间隔件和源极/漏极区域之上延伸；接触插塞，延伸穿过ILD并接触源极/漏极区域；电介质层，包括位于ILD的顶表面上的第一部分以及在ILD和接触插塞之间延伸的第二部分，其中，第二部分的顶表面比IL